[PATCH] lantiq: update USB controller handling
Martin Blumenstingl
martin.blumenstingl at googlemail.com
Fri Jan 6 11:26:15 PST 2017
Hi Hauke,
(CC'ing Mathias as he was looking into some of the USB issues as well)
On Fri, Jan 6, 2017 at 8:06 PM, Hauke Mehrtens <hauke at hauke-m.de> wrote:
> This makes the code use the same settings aas the vendor sdrivers.
s/aas/as/
s/sdrivers/driver/
you should probably also mention that this:
1. backports USB initialization fixes for XRX300, Danube and Amazon-SE
2. sets the clock source for all SoCs which fixes USB (initialization)
issues on Danube when using the dwc2 driver (thus fixes FS#351 and
supersedes Mathias' "lantiq: set the usb clock source" RFC patch)
> Signed-off-by: Hauke Mehrtens <hauke at hauke-m.de>
> ---
> target/linux/lantiq/dts/amazonse.dtsi | 3 +-
> target/linux/lantiq/dts/ar9.dtsi | 6 +-
> target/linux/lantiq/dts/danube.dtsi | 2 +-
> target/linux/lantiq/dts/vr9.dtsi | 6 +-
> ...MIPS-lantiq-danube-initialize-usb-on-boot.patch | 10 -
> .../patches-4.4/0041-USB-DWC2-add-ltq-params.patch | 75 --------
> .../linux/lantiq/patches-4.4/0047-poweroff.patch | 2 +-
> ...2-Add-support-for-Lantiq-ARX-and-XRX-SoCs.patch | 78 ++++++++
> ...ke-the-lantiq-settings-match-vendor-drive.patch | 53 ++++++
> .../patches-4.4/0062-USB-DWC2-add-ltq-params.patch | 47 +++++
> ...65-MIPS-lantiq-improve-USB-initialization.patch | 202 +++++++++++++++++++++
> ...x200-add-gphy-clk-src-device-tree-binding.patch | 6 +-
> 12 files changed, 395 insertions(+), 95 deletions(-)
> delete mode 100644 target/linux/lantiq/patches-4.4/0039-MIPS-lantiq-danube-initialize-usb-on-boot.patch
> delete mode 100644 target/linux/lantiq/patches-4.4/0041-USB-DWC2-add-ltq-params.patch
> create mode 100644 target/linux/lantiq/patches-4.4/0060-usb-dwc2-Add-support-for-Lantiq-ARX-and-XRX-SoCs.patch
> create mode 100644 target/linux/lantiq/patches-4.4/0061-USB-DWC2-make-the-lantiq-settings-match-vendor-drive.patch
> create mode 100644 target/linux/lantiq/patches-4.4/0062-USB-DWC2-add-ltq-params.patch
> create mode 100644 target/linux/lantiq/patches-4.4/0065-MIPS-lantiq-improve-USB-initialization.patch
>
> diff --git a/target/linux/lantiq/dts/amazonse.dtsi b/target/linux/lantiq/dts/amazonse.dtsi
> index bce618fed8..2b8ad08140 100644
> --- a/target/linux/lantiq/dts/amazonse.dtsi
> +++ b/target/linux/lantiq/dts/amazonse.dtsi
> @@ -122,11 +122,12 @@
> };
>
> ifxhcd at E101000 {
> - compatible = "lantiq,ifxhcd-ase";
> + compatible = "lantiq,ase-usb", "lantiq,ifxhcd-ase";
> reg = <0xE101000 0x1000
> 0xE120000 0x3f000>;
> interrupt-parent = <&icu0>;
> interrupts = <39>;
> + dr_mode = "host";
> status = "disabled";
> };
>
> diff --git a/target/linux/lantiq/dts/ar9.dtsi b/target/linux/lantiq/dts/ar9.dtsi
> index 569f25f02c..2638a4b268 100644
> --- a/target/linux/lantiq/dts/ar9.dtsi
> +++ b/target/linux/lantiq/dts/ar9.dtsi
> @@ -137,20 +137,22 @@
> };
>
> ifxhcd at E101000 {
> - compatible = "lantiq,ifxhcd-arx100", "lantiq,ifxhcd-arx100-dwc2";
> + compatible = "lantiq,arx100-usb", "lantiq,ifxhcd-arx100";
> reg = <0xE101000 0x1000
> 0xE120000 0x3f000>;
> interrupt-parent = <&icu0>;
> interrupts = <62 91>;
> + dr_mode = "host";
> status = "disabled";
> };
>
> ifxhcd at E106000 {
> - compatible = "lantiq,ifxhcd-arx100-dwc2";
> + compatible = "lantiq,arx100-usb";
> reg = <0xE106000 0x1000
> 0xE1E0000 0x3f000>;
> interrupt-parent = <&icu0>;
> interrupts = <91>;
> + dr_mode = "host";
> status = "disabled";
> };
>
> diff --git a/target/linux/lantiq/dts/danube.dtsi b/target/linux/lantiq/dts/danube.dtsi
> index f11787f975..83e85c36a5 100644
> --- a/target/linux/lantiq/dts/danube.dtsi
> +++ b/target/linux/lantiq/dts/danube.dtsi
> @@ -143,7 +143,7 @@
> };
>
> ifxhcd at E101000 {
> - compatible = "lantiq,ifxhcd-danube-dwc2", "lantiq,ifxhcd-danube";
> + compatible = "lantiq,danube-usb", "lantiq,ifxhcd-danube";
> reg = <0xE101000 0x1000
> 0xE120000 0x3f000>;
> interrupt-parent = <&icu0>;
> diff --git a/target/linux/lantiq/dts/vr9.dtsi b/target/linux/lantiq/dts/vr9.dtsi
> index 4810a91c5c..eff4944411 100644
> --- a/target/linux/lantiq/dts/vr9.dtsi
> +++ b/target/linux/lantiq/dts/vr9.dtsi
> @@ -177,19 +177,21 @@
>
> ifxhcd at E101000 {
> status = "disabled";
> - compatible = "lantiq,ifxhcd-xrx200", "lantiq,ifxhcd-xrx200-dwc2";
> + compatible = "lantiq,xrx200-usb", "lantiq,ifxhcd-xrx200";
> reg = <0xE101000 0x1000
> 0xE120000 0x3f000>;
> interrupt-parent = <&icu0>;
> interrupts = <62 91>;
> + dr_mode = "host";
> };
>
> ifxhcd at E106000 {
> status = "disabled";
> - compatible = "lantiq,ifxhcd-xrx200-dwc2";
> + compatible = "lantiq,xrx200-usb";
> reg = <0xE106000 0x1000>;
> interrupt-parent = <&icu0>;
> interrupts = <91>;
> + dr_mode = "host";
> };
>
> eth0: eth at E108000 {
> diff --git a/target/linux/lantiq/patches-4.4/0039-MIPS-lantiq-danube-initialize-usb-on-boot.patch b/target/linux/lantiq/patches-4.4/0039-MIPS-lantiq-danube-initialize-usb-on-boot.patch
> deleted file mode 100644
> index bd42f38c0a..0000000000
> --- a/target/linux/lantiq/patches-4.4/0039-MIPS-lantiq-danube-initialize-usb-on-boot.patch
> +++ /dev/null
> @@ -1,10 +0,0 @@
> ---- a/arch/mips/lantiq/xway/reset.c
> -+++ b/arch/mips/lantiq/xway/reset.c
> -@@ -370,6 +370,7 @@ static int __init mips_reboot_setup(void
> - panic("Failed to remap core memory");
> -
> - if (of_machine_is_compatible("lantiq,ar9") ||
> -+ of_machine_is_compatible("lantiq,danube") ||
> - of_machine_is_compatible("lantiq,vr9"))
> - ltq_usb_init();
> -
> diff --git a/target/linux/lantiq/patches-4.4/0041-USB-DWC2-add-ltq-params.patch b/target/linux/lantiq/patches-4.4/0041-USB-DWC2-add-ltq-params.patch
> deleted file mode 100644
> index 68d5f3ff4d..0000000000
> --- a/target/linux/lantiq/patches-4.4/0041-USB-DWC2-add-ltq-params.patch
> +++ /dev/null
> @@ -1,75 +0,0 @@
> ---- a/drivers/usb/dwc2/platform.c
> -+++ b/drivers/usb/dwc2/platform.c
> -@@ -145,6 +145,62 @@ static int __dwc2_lowlevel_hw_enable(str
> - return ret;
> - }
> -
> -+static const struct dwc2_core_params params_ltq = {
> -+ .otg_cap = 2, /* non-HNP/non-SRP */
> -+ .otg_ver = -1,
> -+ .dma_enable = -1,
> -+ .dma_desc_enable = -1,
> -+ .speed = -1,
> -+ .enable_dynamic_fifo = -1,
> -+ .en_multiple_tx_fifo = -1,
> -+ .host_rx_fifo_size = 288, /* 288 DWORDs */
> -+ .host_nperio_tx_fifo_size = 128, /* 128 DWORDs */
> -+ .host_perio_tx_fifo_size = 96, /* 96 DWORDs */
> -+ .max_transfer_size = -1,
> -+ .max_packet_count = 511,
> -+ .host_channels = -1,
> -+ .phy_type = -1,
> -+ .phy_utmi_width = -1,
> -+ .phy_ulpi_ddr = -1,
> -+ .phy_ulpi_ext_vbus = -1,
> -+ .i2c_enable = -1,
> -+ .ulpi_fs_ls = -1,
> -+ .host_support_fs_ls_low_power = -1,
> -+ .host_ls_low_power_phy_clk = -1,
> -+ .ts_dline = -1,
> -+ .reload_ctl = -1,
> -+ .ahbcfg = GAHBCFG_HBSTLEN_INCR16 << GAHBCFG_HBSTLEN_SHIFT,
> -+ .uframe_sched = -1,
> -+};
> -+
> -+static const struct dwc2_core_params params_danube = {
> -+ .otg_cap = 2, /* non-HNP/non-SRP */
> -+ .otg_ver = -1,
> -+ .dma_enable = -1,
> -+ .dma_desc_enable = -1,
> -+ .speed = -1,
> -+ .enable_dynamic_fifo = -1,
> -+ .en_multiple_tx_fifo = -1,
> -+ .host_rx_fifo_size = -1,
> -+ .host_nperio_tx_fifo_size = -1,
> -+ .host_perio_tx_fifo_size = -1,
> -+ .max_transfer_size = -1,
> -+ .max_packet_count = -1,
> -+ .host_channels = -1,
> -+ .phy_type = -1,
> -+ .phy_utmi_width = -1,
> -+ .phy_ulpi_ddr = -1,
> -+ .phy_ulpi_ext_vbus = -1,
> -+ .i2c_enable = -1,
> -+ .ulpi_fs_ls = -1,
> -+ .host_support_fs_ls_low_power = -1,
> -+ .host_ls_low_power_phy_clk = -1,
> -+ .ts_dline = -1,
> -+ .reload_ctl = -1,
> -+ .ahbcfg = -1,
> -+ .uframe_sched = -1,
> -+};
> -+
> - /**
> - * dwc2_lowlevel_hw_enable - enable platform lowlevel hw resources
> - * @hsotg: The driver state
> -@@ -310,6 +366,9 @@ static int dwc2_driver_remove(struct pla
> - static const struct of_device_id dwc2_of_match_table[] = {
> - { .compatible = "brcm,bcm2835-usb", .data = ¶ms_bcm2835 },
> - { .compatible = "rockchip,rk3066-usb", .data = ¶ms_rk3066 },
> -+ { .compatible = "lantiq,ifxhcd-danube-dwc2", .data = ¶ms_danube },
> -+ { .compatible = "lantiq,ifxhcd-arx100-dwc2", .data = ¶ms_ltq },
> -+ { .compatible = "lantiq,ifxhcd-xrx200-dwc2", .data = ¶ms_ltq },
> - { .compatible = "snps,dwc2", .data = NULL },
> - { .compatible = "samsung,s3c6400-hsotg", .data = NULL},
> - {},
> diff --git a/target/linux/lantiq/patches-4.4/0047-poweroff.patch b/target/linux/lantiq/patches-4.4/0047-poweroff.patch
> index 88aed2ce96..54249bba52 100644
> --- a/target/linux/lantiq/patches-4.4/0047-poweroff.patch
> +++ b/target/linux/lantiq/patches-4.4/0047-poweroff.patch
> @@ -13,7 +13,7 @@
> static void ltq_usb_init(void)
> {
> /* Power for USB cores 1 & 2 */
> -@@ -380,7 +374,6 @@ static int __init mips_reboot_setup(void
> +@@ -379,7 +373,6 @@ static int __init mips_reboot_setup(void
>
> _machine_restart = ltq_machine_restart;
> _machine_halt = ltq_machine_halt;
> diff --git a/target/linux/lantiq/patches-4.4/0060-usb-dwc2-Add-support-for-Lantiq-ARX-and-XRX-SoCs.patch b/target/linux/lantiq/patches-4.4/0060-usb-dwc2-Add-support-for-Lantiq-ARX-and-XRX-SoCs.patch
> new file mode 100644
> index 0000000000..91d6ac92e7
> --- /dev/null
> +++ b/target/linux/lantiq/patches-4.4/0060-usb-dwc2-Add-support-for-Lantiq-ARX-and-XRX-SoCs.patch
> @@ -0,0 +1,78 @@
> +From 6c0c0951bbf8c2c216675fe277fba4c42aa0a2bf Mon Sep 17 00:00:00 2001
> +From: =?UTF-8?q?Antti=20Sepp=C3=A4l=C3=A4?= <a.seppala at gmail.com>
> +Date: Sat, 27 Feb 2016 12:31:24 +0200
> +Subject: [PATCH] usb: dwc2: Add support for Lantiq ARX and XRX SoCs
> +MIME-Version: 1.0
> +Content-Type: text/plain; charset=UTF-8
> +Content-Transfer-Encoding: 8bit
> +
> +Add support for Lantiq ARX and XRX SoC families to the dwc2 driver.
> +
> +Acked-by: John Youn <johnyoun at synopsys.com>
> +Signed-off-by: Antti Seppälä <a.seppala at gmail.com>
> +Signed-off-by: Felipe Balbi <balbi at kernel.org>
> +---
> + Documentation/devicetree/bindings/usb/dwc2.txt | 2 ++
> + drivers/usb/dwc2/platform.c | 34 ++++++++++++++++++++++++++
> + 2 files changed, 36 insertions(+)
> +
> +--- a/Documentation/devicetree/bindings/usb/dwc2.txt
> ++++ b/Documentation/devicetree/bindings/usb/dwc2.txt
> +@@ -7,6 +7,8 @@ Required properties:
> + - rockchip,rk3066-usb: The DWC2 USB controller instance in the rk3066 Soc;
> + - "rockchip,rk3188-usb", "rockchip,rk3066-usb", "snps,dwc2": for rk3188 Soc;
> + - "rockchip,rk3288-usb", "rockchip,rk3066-usb", "snps,dwc2": for rk3288 Soc;
> ++ - "lantiq,arx100-usb": The DWC2 USB controller instance in Lantiq ARX SoCs;
> ++ - "lantiq,xrx200-usb": The DWC2 USB controller instance in Lantiq XRX SoCs;
> + - snps,dwc2: A generic DWC2 USB controller with default parameters.
> + - reg : Should contain 1 register range (address and length)
> + - interrupts : Should contain 1 interrupt
> +--- a/drivers/usb/dwc2/platform.c
> ++++ b/drivers/usb/dwc2/platform.c
> +@@ -116,6 +116,37 @@ static const struct dwc2_core_params par
> + .hibernation = -1,
> + };
> +
> ++static const struct dwc2_core_params params_ltq = {
> ++ .otg_cap = 2, /* non-HNP/non-SRP */
> ++ .otg_ver = -1,
> ++ .dma_enable = -1,
> ++ .dma_desc_enable = -1,
> ++ .speed = -1,
> ++ .enable_dynamic_fifo = -1,
> ++ .en_multiple_tx_fifo = -1,
> ++ .host_rx_fifo_size = 288, /* 288 DWORDs */
> ++ .host_nperio_tx_fifo_size = 128, /* 128 DWORDs */
> ++ .host_perio_tx_fifo_size = 96, /* 96 DWORDs */
> ++ .max_transfer_size = 65535,
> ++ .max_packet_count = 511,
> ++ .host_channels = -1,
> ++ .phy_type = -1,
> ++ .phy_utmi_width = -1,
> ++ .phy_ulpi_ddr = -1,
> ++ .phy_ulpi_ext_vbus = -1,
> ++ .i2c_enable = -1,
> ++ .ulpi_fs_ls = -1,
> ++ .host_support_fs_ls_low_power = -1,
> ++ .host_ls_low_power_phy_clk = -1,
> ++ .ts_dline = -1,
> ++ .reload_ctl = -1,
> ++ .ahbcfg = GAHBCFG_HBSTLEN_INCR16 <<
> ++ GAHBCFG_HBSTLEN_SHIFT,
> ++ .uframe_sched = -1,
> ++ .external_id_pin_ctl = -1,
> ++ .hibernation = -1,
> ++};
> ++
> + static int __dwc2_lowlevel_hw_enable(struct dwc2_hsotg *hsotg)
> + {
> + struct platform_device *pdev = to_platform_device(hsotg->dev);
> +@@ -310,6 +341,8 @@ static int dwc2_driver_remove(struct pla
> + static const struct of_device_id dwc2_of_match_table[] = {
> + { .compatible = "brcm,bcm2835-usb", .data = ¶ms_bcm2835 },
> + { .compatible = "rockchip,rk3066-usb", .data = ¶ms_rk3066 },
> ++ { .compatible = "lantiq,arx100-usb", .data = ¶ms_ltq },
> ++ { .compatible = "lantiq,xrx200-usb", .data = ¶ms_ltq },
> + { .compatible = "snps,dwc2", .data = NULL },
> + { .compatible = "samsung,s3c6400-hsotg", .data = NULL},
> + {},
> diff --git a/target/linux/lantiq/patches-4.4/0061-USB-DWC2-make-the-lantiq-settings-match-vendor-drive.patch b/target/linux/lantiq/patches-4.4/0061-USB-DWC2-make-the-lantiq-settings-match-vendor-drive.patch
> new file mode 100644
> index 0000000000..7a48910442
> --- /dev/null
> +++ b/target/linux/lantiq/patches-4.4/0061-USB-DWC2-make-the-lantiq-settings-match-vendor-drive.patch
> @@ -0,0 +1,53 @@
> +From be028b8785d219a60d00a67fe3c5f421c2a22d56 Mon Sep 17 00:00:00 2001
> +From: Hauke Mehrtens <hauke at hauke-m.de>
> +Date: Fri, 6 Jan 2017 17:55:24 +0100
> +Subject: [PATCH 1/2] USB: DWC2: make the lantiq settings match vendor driver
> +
> +Make the settings for the dwc2 driver match the settings used by the
> +vendor driver.
> +
> +Signed-off-by: Hauke Mehrtens <hauke at hauke-m.de>
> +---
> + drivers/usb/dwc2/platform.c | 17 +++++++++--------
> + 1 file changed, 9 insertions(+), 8 deletions(-)
> +
> +--- a/drivers/usb/dwc2/platform.c
> ++++ b/drivers/usb/dwc2/platform.c
> +@@ -120,18 +120,18 @@ static const struct dwc2_core_params par
> + .otg_cap = 2, /* non-HNP/non-SRP */
> + .otg_ver = -1,
> + .dma_enable = -1,
> +- .dma_desc_enable = -1,
> +- .speed = -1,
> ++ .dma_desc_enable = 0,
> ++ .speed = DWC2_SPEED_PARAM_HIGH,
> + .enable_dynamic_fifo = -1,
> + .en_multiple_tx_fifo = -1,
> +- .host_rx_fifo_size = 288, /* 288 DWORDs */
> +- .host_nperio_tx_fifo_size = 128, /* 128 DWORDs */
> +- .host_perio_tx_fifo_size = 96, /* 96 DWORDs */
> +- .max_transfer_size = 65535,
> +- .max_packet_count = 511,
> ++ .host_rx_fifo_size = 240, /* 240 DWORDs */
> ++ .host_nperio_tx_fifo_size = 240, /* 240 DWORDs */
> ++ .host_perio_tx_fifo_size = 32, /* 32 DWORDs */
> ++ .max_transfer_size = -1,
> ++ .max_packet_count = -1,
> + .host_channels = -1,
> +- .phy_type = -1,
> +- .phy_utmi_width = -1,
> ++ .phy_type = DWC2_PHY_TYPE_PARAM_UTMI,
> ++ .phy_utmi_width = 16,
> + .phy_ulpi_ddr = -1,
> + .phy_ulpi_ext_vbus = -1,
> + .i2c_enable = -1,
> +@@ -140,7 +140,8 @@ static const struct dwc2_core_params par
> + .host_ls_low_power_phy_clk = -1,
> + .ts_dline = -1,
> + .reload_ctl = -1,
> +- .ahbcfg = GAHBCFG_HBSTLEN_INCR16 <<
> ++ /* vr9 a1x chip rev should use GAHBCFG_HBSTLEN_SINGLE */
> ++ .ahbcfg = GAHBCFG_HBSTLEN_INCR4 <<
> + GAHBCFG_HBSTLEN_SHIFT,
> + .uframe_sched = -1,
> + .external_id_pin_ctl = -1,
> diff --git a/target/linux/lantiq/patches-4.4/0062-USB-DWC2-add-ltq-params.patch b/target/linux/lantiq/patches-4.4/0062-USB-DWC2-add-ltq-params.patch
> new file mode 100644
> index 0000000000..492525349d
> --- /dev/null
> +++ b/target/linux/lantiq/patches-4.4/0062-USB-DWC2-add-ltq-params.patch
> @@ -0,0 +1,47 @@
> +--- a/drivers/usb/dwc2/platform.c
> ++++ b/drivers/usb/dwc2/platform.c
> +@@ -148,6 +148,35 @@ static const struct dwc2_core_params par
> + .hibernation = -1,
> + };
> +
> ++static const struct dwc2_core_params params_danube = {
> ++ .otg_cap = 2, /* non-HNP/non-SRP */
> ++ .otg_ver = -1,
> ++ .dma_enable = -1,
> ++ .dma_desc_enable = 0,
> ++ .speed = DWC2_SPEED_PARAM_HIGH,
> ++ .enable_dynamic_fifo = -1,
> ++ .en_multiple_tx_fifo = -1,
> ++ .host_rx_fifo_size = 640,
> ++ .host_nperio_tx_fifo_size = 640,
> ++ .host_perio_tx_fifo_size = 768,
> ++ .max_transfer_size = -1,
> ++ .max_packet_count = -1,
> ++ .host_channels = -1,
> ++ .phy_type = -1,
> ++ .phy_utmi_width = 16,
> ++ .phy_ulpi_ddr = -1,
> ++ .phy_ulpi_ext_vbus = -1,
> ++ .i2c_enable = -1,
> ++ .ulpi_fs_ls = -1,
> ++ .host_support_fs_ls_low_power = -1,
> ++ .host_ls_low_power_phy_clk = -1,
> ++ .ts_dline = -1,
> ++ .reload_ctl = -1,
> ++ .ahbcfg = GAHBCFG_HBSTLEN_INCR4 <<
> ++ GAHBCFG_HBSTLEN_SHIFT,
> ++ .uframe_sched = -1,
> ++};
> ++
> + static int __dwc2_lowlevel_hw_enable(struct dwc2_hsotg *hsotg)
> + {
> + struct platform_device *pdev = to_platform_device(hsotg->dev);
> +@@ -342,6 +371,8 @@ static int dwc2_driver_remove(struct pla
> + static const struct of_device_id dwc2_of_match_table[] = {
> + { .compatible = "brcm,bcm2835-usb", .data = ¶ms_bcm2835 },
> + { .compatible = "rockchip,rk3066-usb", .data = ¶ms_rk3066 },
> ++ { .compatible = "lantiq,danube-usb", .data = ¶ms_danube },
> ++ { .compatible = "lantiq,ase-usb", .data = ¶ms_ltq },
> + { .compatible = "lantiq,arx100-usb", .data = ¶ms_ltq },
> + { .compatible = "lantiq,xrx200-usb", .data = ¶ms_ltq },
> + { .compatible = "snps,dwc2", .data = NULL },
> diff --git a/target/linux/lantiq/patches-4.4/0065-MIPS-lantiq-improve-USB-initialization.patch b/target/linux/lantiq/patches-4.4/0065-MIPS-lantiq-improve-USB-initialization.patch
> new file mode 100644
> index 0000000000..e23d38733f
> --- /dev/null
> +++ b/target/linux/lantiq/patches-4.4/0065-MIPS-lantiq-improve-USB-initialization.patch
> @@ -0,0 +1,202 @@
> +From 14909c4e4e836925668e74fc6e0e85ba0283cbf9 Mon Sep 17 00:00:00 2001
> +From: Hauke Mehrtens <hauke at hauke-m.de>
> +Date: Fri, 6 Jan 2017 17:40:12 +0100
> +Subject: [PATCH 2/2] MIPS: lantiq: improve USB initialization
> +
> +This adds code to initialize the USB controller and PHY also on Danube,
> +Amazon SE and AR10. This code is based on the Vendor driver from
> +different UGW versions and compared to the hardware documentation.
> +
> +Signed-off-by: Hauke Mehrtens <hauke at hauke-m.de>
> +---
> + arch/mips/lantiq/xway/reset.c | 120 ++++++++++++++++++++++++++++++----------
> + arch/mips/lantiq/xway/sysctrl.c | 20 +++++++
> + 2 files changed, 110 insertions(+), 30 deletions(-)
> +
> +--- a/arch/mips/lantiq/xway/reset.c
> ++++ b/arch/mips/lantiq/xway/reset.c
> +@@ -72,6 +72,8 @@
> + #define RCU_USBCFG_HDSEL_BIT BIT(11)
> + #define RCU_USBCFG_HOST_END_BIT BIT(10)
> + #define RCU_USBCFG_SLV_END_BIT BIT(9)
> ++#define RCU_USBCFG_SLV_END_BIT_AR9 BIT(17)
> ++
> +
> + /* USB reset bits */
> + #define RCU_USBRESET 0x0010
> +@@ -85,6 +87,8 @@
> +
> + #define RCU_CFG1A 0x0038
> + #define RCU_CFG1B 0x003C
> ++#define RCU_CFG1_TX_PEE BIT(0)
> ++#define RCU_CFG1_DIS_THR_SHIFT 15 /* Disconnect Threshold */
> +
> + /* USB PMU devices */
> + #define PMU_AHBM BIT(15)
> +@@ -306,38 +310,91 @@ static void ltq_usb_init(void)
> + /* Power for USB cores 1 & 2 */
> + ltq_pmu_enable(PMU_AHBM);
> + ltq_pmu_enable(PMU_USB0);
> +- ltq_pmu_enable(PMU_USB1);
> +
> +- ltq_rcu_w32(ltq_rcu_r32(RCU_CFG1A) | BIT(0), RCU_CFG1A);
> +- ltq_rcu_w32(ltq_rcu_r32(RCU_CFG1B) | BIT(0), RCU_CFG1B);
> ++ if (of_machine_is_compatible("lantiq,ar10") ||
> ++ of_machine_is_compatible("lantiq,grx390") ||
> ++ of_machine_is_compatible("lantiq,ar9") ||
> ++ of_machine_is_compatible("lantiq,vr9"))
> ++ ltq_pmu_enable(PMU_USB1);
> ++
> ++ if (of_machine_is_compatible("lantiq,vr9") ||
> ++ of_machine_is_compatible("lantiq,ar10")) {
> ++ ltq_rcu_w32(ltq_rcu_r32(RCU_CFG1A) | RCU_CFG1_TX_PEE |
> ++ 7 << RCU_CFG1_DIS_THR_SHIFT, RCU_CFG1A);
> ++ ltq_rcu_w32(ltq_rcu_r32(RCU_CFG1B) | RCU_CFG1_TX_PEE |
> ++ 7 << RCU_CFG1_DIS_THR_SHIFT, RCU_CFG1B);
> ++ }
> +
> + /* Enable USB PHY power for cores 1 & 2 */
> + ltq_pmu_enable(PMU_USB0_P);
> +- ltq_pmu_enable(PMU_USB1_P);
> ++ if (of_machine_is_compatible("lantiq,ar10") ||
> ++ of_machine_is_compatible("lantiq,grx390") ||
> ++ of_machine_is_compatible("lantiq,ar9") ||
> ++ of_machine_is_compatible("lantiq,vr9"))
> ++ ltq_pmu_enable(PMU_USB1_P);
> ++
> ++ if (of_machine_is_compatible("lantiq,ase") ||
> ++ of_machine_is_compatible("lantiq,danube")) {
> ++ /* Configure cores to host mode */
> ++ ltq_rcu_w32(ltq_rcu_r32(RCU_USB1CFG) & ~RCU_USBCFG_HDSEL_BIT,
> ++ RCU_USB1CFG);
> ++
> ++ /* Select DMA endianness (Host-endian: big-endian) */
> ++ ltq_rcu_w32((ltq_rcu_r32(RCU_USB1CFG) & ~RCU_USBCFG_SLV_END_BIT)
> ++ | RCU_USBCFG_HOST_END_BIT, RCU_USB1CFG);
> ++ }
> ++
> ++ if (of_machine_is_compatible("lantiq,ar9")) {
> ++ /* Configure cores to host mode */
> ++ ltq_rcu_w32(ltq_rcu_r32(RCU_USB1CFG) & ~RCU_USBCFG_HDSEL_BIT,
> ++ RCU_USB1CFG);
> ++ ltq_rcu_w32(ltq_rcu_r32(RCU_USB2CFG) & ~RCU_USBCFG_HDSEL_BIT,
> ++ RCU_USB2CFG);
> ++
> ++ /* Select DMA endianness (Host-endian: big-endian) */
> ++ ltq_rcu_w32((ltq_rcu_r32(RCU_USB1CFG) & ~RCU_USBCFG_SLV_END_BIT_AR9)
> ++ | RCU_USBCFG_HOST_END_BIT, RCU_USB1CFG);
> ++ ltq_rcu_w32(ltq_rcu_r32((RCU_USB2CFG) & ~RCU_USBCFG_SLV_END_BIT_AR9)
> ++ | RCU_USBCFG_HOST_END_BIT, RCU_USB2CFG);
> ++ }
> ++
> ++ if (of_machine_is_compatible("lantiq,vr9") ||
> ++ of_machine_is_compatible("lantiq,ar10")) {
> ++ /* Configure cores to host mode */
> ++ ltq_rcu_w32(ltq_rcu_r32(RCU_USB1CFG) & ~RCU_USBCFG_HDSEL_BIT,
> ++ RCU_USB1CFG);
> ++ ltq_rcu_w32(ltq_rcu_r32(RCU_USB2CFG) & ~RCU_USBCFG_HDSEL_BIT,
> ++ RCU_USB2CFG);
> ++
> ++ /* Select DMA endianness (Host-endian: big-endian) */
> ++ ltq_rcu_w32((ltq_rcu_r32(RCU_USB1CFG) & ~RCU_USBCFG_SLV_END_BIT)
> ++ | RCU_USBCFG_HOST_END_BIT, RCU_USB1CFG);
> ++ ltq_rcu_w32(ltq_rcu_r32((RCU_USB2CFG) & ~RCU_USBCFG_SLV_END_BIT)
> ++ | RCU_USBCFG_HOST_END_BIT, RCU_USB2CFG);
> ++ }
> ++
> ++ if (of_machine_is_compatible("lantiq,ar9")) {
> ++ /* Hard reset USB state machines */
> ++ ltq_rcu_w32(ltq_rcu_r32(RCU_USBRESET)
> ++ | USBRESET_BIT | BIT(28), RCU_USBRESET);
> ++ udelay(50 * 1000);
> ++ ltq_rcu_w32(ltq_rcu_r32(RCU_USBRESET)
> ++ & ~(USBRESET_BIT | BIT(28)), RCU_USBRESET);
> ++ } else {
> ++ /* Hard reset USB state machines */
> ++ ltq_rcu_w32(ltq_rcu_r32(RCU_USBRESET) | USBRESET_BIT, RCU_USBRESET);
> ++ udelay(50 * 1000);
> ++ ltq_rcu_w32(ltq_rcu_r32(RCU_USBRESET) & ~USBRESET_BIT, RCU_USBRESET);
> ++ }
> +
> +- /* Configure cores to host mode */
> +- ltq_rcu_w32(ltq_rcu_r32(RCU_USB1CFG) & ~RCU_USBCFG_HDSEL_BIT,
> +- RCU_USB1CFG);
> +- ltq_rcu_w32(ltq_rcu_r32(RCU_USB2CFG) & ~RCU_USBCFG_HDSEL_BIT,
> +- RCU_USB2CFG);
> +-
> +- /* Select DMA endianness (Host-endian: big-endian) */
> +- ltq_rcu_w32((ltq_rcu_r32(RCU_USB1CFG) & ~RCU_USBCFG_SLV_END_BIT)
> +- | RCU_USBCFG_HOST_END_BIT, RCU_USB1CFG);
> +- ltq_rcu_w32(ltq_rcu_r32((RCU_USB2CFG) & ~RCU_USBCFG_SLV_END_BIT)
> +- | RCU_USBCFG_HOST_END_BIT, RCU_USB2CFG);
> +-
> +- /* Hard reset USB state machines */
> +- ltq_rcu_w32(ltq_rcu_r32(RCU_USBRESET) | USBRESET_BIT, RCU_USBRESET);
> +- udelay(50 * 1000);
> +- ltq_rcu_w32(ltq_rcu_r32(RCU_USBRESET) & ~USBRESET_BIT, RCU_USBRESET);
> +-
> +- /* Soft reset USB state machines */
> +- ltq_rcu_w32(ltq_rcu_r32(RCU_USBRESET2)
> +- | USB1RESET_BIT | USB2RESET_BIT, RCU_USBRESET2);
> +- udelay(50 * 1000);
> +- ltq_rcu_w32(ltq_rcu_r32(RCU_USBRESET2)
> +- & ~(USB1RESET_BIT | USB2RESET_BIT), RCU_USBRESET2);
> ++ if (of_machine_is_compatible("lantiq,vr9")) {
> ++ /* Soft reset USB state machines */
> ++ ltq_rcu_w32(ltq_rcu_r32(RCU_USBRESET2)
> ++ | USB1RESET_BIT | USB2RESET_BIT, RCU_USBRESET2);
> ++ udelay(50 * 1000);
> ++ ltq_rcu_w32(ltq_rcu_r32(RCU_USBRESET2)
> ++ & ~(USB1RESET_BIT | USB2RESET_BIT), RCU_USBRESET2);
> ++ }
> + }
> +
> + static int __init mips_reboot_setup(void)
> +@@ -363,8 +420,11 @@ static int __init mips_reboot_setup(void
> + if (!ltq_rcu_membase)
> + panic("Failed to remap core memory");
> +
> +- if (of_machine_is_compatible("lantiq,ar9") ||
> +- of_machine_is_compatible("lantiq,vr9"))
> ++ if (of_machine_is_compatible("lantiq,danube") ||
> ++ of_machine_is_compatible("lantiq,ase") ||
> ++ of_machine_is_compatible("lantiq,ar9") ||
> ++ of_machine_is_compatible("lantiq,vr9") ||
> ++ of_machine_is_compatible("lantiq,ar10"))
> + ltq_usb_init();
> +
> + if (of_machine_is_compatible("lantiq,vr9"))
> +--- a/arch/mips/lantiq/xway/sysctrl.c
> ++++ b/arch/mips/lantiq/xway/sysctrl.c
> +@@ -254,6 +254,25 @@ static void pmu_disable(struct clk *clk)
> + pr_warn("deactivating PMU module failed!");
> + }
> +
> ++static void usb_set_clock(void)
> ++{
> ++ unsigned int val = ltq_cgu_r32(ifccr);
> ++
> ++ if (of_machine_is_compatible("lantiq,ar10") ||
> ++ of_machine_is_compatible("lantiq,grx390")) {
> ++ val &= ~0x03; /* XTAL devices by 3 */
nit: divides
> ++ } else if (of_machine_is_compatible("lantiq,ar9") ||
> ++ of_machine_is_compatible("lantiq,vr9")) {
> ++ /* TODO: this depends on the XTLA frequency */
> ++ val |= 0x03; /* XTAL devices by 3 */
nit: divides
> ++ } else if (of_machine_is_compatible("lantiq,ase")) {
> ++ val |= 0x20; /* from XTLA */
nit: XTAL
> ++ } else if (of_machine_is_compatible("lantiq,danube")) {
> ++ val |= 0x30; /* 12 MHz, generated from 36 MHz */
> ++ }
> ++ ltq_cgu_w32(val, ifccr);
> ++}
> ++
> + /* the pci enable helper */
> + static int pci_enable(struct clk *clk)
> + {
> +@@ -608,4 +627,5 @@ void __init ltq_soc_init(void)
> +
> + if (of_machine_is_compatible("lantiq,vr9"))
> + xbar_fpi_burst_disable();
> ++ usb_set_clock();
> + }
> diff --git a/target/linux/lantiq/patches-4.4/0301-xrx200-add-gphy-clk-src-device-tree-binding.patch b/target/linux/lantiq/patches-4.4/0301-xrx200-add-gphy-clk-src-device-tree-binding.patch
> index 227d1cf25a..e42aaf9c07 100644
> --- a/target/linux/lantiq/patches-4.4/0301-xrx200-add-gphy-clk-src-device-tree-binding.patch
> +++ b/target/linux/lantiq/patches-4.4/0301-xrx200-add-gphy-clk-src-device-tree-binding.patch
> @@ -1,6 +1,6 @@
> --- a/arch/mips/lantiq/xway/sysctrl.c
> +++ b/arch/mips/lantiq/xway/sysctrl.c
> -@@ -423,6 +423,20 @@ static void clkdev_add_clkout(void)
> +@@ -442,6 +442,20 @@ static void clkdev_add_clkout(void)
> }
> }
>
> @@ -21,10 +21,10 @@
> /* bring up all register ranges that we need for basic system control */
> void __init ltq_soc_init(void)
> {
> -@@ -608,4 +622,6 @@ void __init ltq_soc_init(void)
> -
> +@@ -628,4 +642,6 @@ void __init ltq_soc_init(void)
> if (of_machine_is_compatible("lantiq,vr9"))
> xbar_fpi_burst_disable();
> + usb_set_clock();
> +
> + set_phy_clock_source(np_cgu);
> }
> --
> 2.11.0
>
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