[openwrt/openwrt] realtek: pcs: add dedicated enum for SerDes modes
LEDE Commits
lede-commits at lists.infradead.org
Tue Dec 16 04:37:38 PST 2025
robimarko pushed a commit to openwrt/openwrt.git, branch main:
https://git.openwrt.org/a4d6e10bf2561a39d9bb3c9e622531e8d5c9caf3
commit a4d6e10bf2561a39d9bb3c9e622531e8d5c9caf3
Author: Jonas Jelonek <jelonek.jonas at gmail.com>
AuthorDate: Thu Dec 11 19:17:26 2025 +0000
realtek: pcs: add dedicated enum for SerDes modes
The Realtek SerDes mode capabilities do not map 1:1 to the
PHY_INTERFACE_MODE_* modes used in the kernel and passed to the PCS.
For example, some PHY chips use the proprietary XSGMII mode for which
there isn't an equivalent in the kernel, or HSGMII.
In the past, this led to problems and confusion using kernel's XGMII to
handle the XSGMII mode, and needed a downstream patch for HSGMII. They
have been solved/worked around for now, but XSGMII is currently not
implemented at all. And who knows what might come in the future.
To make our life easier, introduce a dedicated internal representation
of SerDes modes which differs from kernel's PHY_INTERFACE_MODE_*. This
allows us to map "external" modes to different internal modes as needed
instead of carrying the PHY_INTERFACE_MODE_* through the whole SerDes
configuration code. The PCS driver needs to map PHY_INTERFACE_MODE_* to
RTPCS_SDS_MODE_* in pcs_config, and the latter should be used as the
only one.
Signed-off-by: Jonas Jelonek <jelonek.jonas at gmail.com>
Link: https://github.com/openwrt/openwrt/pull/21146
Signed-off-by: Robert Marko <robimarko at gmail.com>
---
.../files-6.12/drivers/net/pcs/pcs-rtl-otto.c | 23 ++++++++++++++++++++++
1 file changed, 23 insertions(+)
diff --git a/target/linux/realtek/files-6.12/drivers/net/pcs/pcs-rtl-otto.c b/target/linux/realtek/files-6.12/drivers/net/pcs/pcs-rtl-otto.c
index def6b445d4..1a87d0d112 100644
--- a/target/linux/realtek/files-6.12/drivers/net/pcs/pcs-rtl-otto.c
+++ b/target/linux/realtek/files-6.12/drivers/net/pcs/pcs-rtl-otto.c
@@ -102,6 +102,29 @@
#define RTL931X_PS_SERDES_OFF_MODE_CTRL_ADDR (0x13F4)
#define RTL931X_MAC_SERDES_MODE_CTRL(sds) (0x136C + (((sds) << 2)))
+enum rtpcs_sds_mode {
+ RTPCS_SDS_MODE_OFF = 0,
+
+ /* fiber modes */
+ RTPCS_SDS_MODE_1000BASEX,
+ RTPCS_SDS_MODE_2500BASEX,
+ RTPCS_SDS_MODE_10GBASER,
+
+ /* mii modes */
+ RTPCS_SDS_MODE_SGMII,
+ RTPCS_SDS_MODE_HISGMII,
+ RTPCS_SDS_MODE_QSGMII,
+ RTPCS_SDS_MODE_QHSGMII,
+ RTPCS_SDS_MODE_XSGMII,
+
+ RTPCS_SDS_MODE_USXGMII_10GSXGMII,
+ RTPCS_SDS_MODE_USXGMII_10GDXGMII,
+ RTPCS_SDS_MODE_USXGMII_10GQXGMII,
+ RTPCS_SDS_MODE_USXGMII_5GSXGMII,
+ RTPCS_SDS_MODE_USXGMII_5GDXGMII,
+ RTPCS_SDS_MODE_USXGMII_2_5GSXGMII,
+};
+
struct rtpcs_ctrl {
struct device *dev;
struct regmap *map;
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