[openwrt/openwrt] lantiq: add patch to fix the reset gpio handling in the pci driver

[LEDE Commits]

nick pushed a commit to openwrt/openwrt.git, branch main:
https://git.openwrt.org/cffd3ad8d7cad2214d44695ad4f2405ea53a26c7

commit cffd3ad8d7cad2214d44695ad4f2405ea53a26c7
Author: Martin Schiller <ms at dev.tdt.de>
AuthorDate: Mon May 6 11:01:15 2024 +0200

    lantiq: add patch to fix the reset gpio handling in the pci driver
    
    Linux kernel commit 90c2d2eb7ab5 ("MIPS: pci: lantiq: switch to using
    gpiod API") not only switched to the gpiod API, but also inverted /
    changed the polarity of the GPIO.
    
    According to the PCI specification, the RST# pin is an active-low
    signal. However, most of the device trees that have been widely used for
    a long time (mainly in the openWrt project) define this GPIO as
    active-high and the old driver code inverted the signal internally.
    
    Apparently there are actually boards where the reset gpio must be
    operated inverted. For this reason, we cannot use the GPIOD_OUT_LOW/HIGH
    flag for initialization. Instead, we must explicitly set the gpio to
    value 1 in order to take into account any "GPIO_ACTIVE_LOW" flag that
    may have been set.
    
    In order to remain compatible with all these existing device trees, we
    should therefore keep the logic as it was before the commit.
    
    Signed-off-by: Martin Schiller <ms at dev.tdt.de>
---
 ...PS-pci-lantiq-restore-reset-gpio-polarity.patch | 62 ++++++++++++++++++++++
 1 file changed, 62 insertions(+)

diff --git a/target/linux/lantiq/patches-6.1/0002-MIPS-pci-lantiq-restore-reset-gpio-polarity.patch b/target/linux/lantiq/patches-6.1/0002-MIPS-pci-lantiq-restore-reset-gpio-polarity.patch
new file mode 100644
index 0000000000..6b70f8b9a7
--- /dev/null
+++ b/target/linux/lantiq/patches-6.1/0002-MIPS-pci-lantiq-restore-reset-gpio-polarity.patch
@@ -0,0 +1,62 @@
+From f038380835033e376d89c72516f087254792bbad Mon Sep 17 00:00:00 2001
+From: Martin Schiller <ms at dev.tdt.de>
+Date: Mon, 6 May 2024 09:41:42 +0200
+Subject: [PATCH] MIPS: pci: lantiq: restore reset gpio polarity
+
+Commit 90c2d2eb7ab5 ("MIPS: pci: lantiq: switch to using gpiod API") not
+only switched to the gpiod API, but also inverted / changed the polarity
+of the GPIO.
+
+According to the PCI specification, the RST# pin is an active-low
+signal. However, most of the device trees that have been widely used for
+a long time (mainly in the openWrt project) define this GPIO as
+active-high and the old driver code inverted the signal internally.
+
+Apparently there are actually boards where the reset gpio must be
+operated inverted. For this reason, we cannot use the GPIOD_OUT_LOW/HIGH
+flag for initialization. Instead, we must explicitly set the gpio to
+value 1 in order to take into account any "GPIO_ACTIVE_LOW" flag that
+may have been set.
+
+In order to remain compatible with all these existing device trees, we
+should therefore keep the logic as it was before the commit.
+
+Fixes: 90c2d2eb7ab5 ("MIPS: pci: lantiq: switch to using gpiod API")
+Cc: stable at vger.kernel.org
+Signed-off-by: Martin Schiller <ms at dev.tdt.de>
+---
+ arch/mips/pci/pci-lantiq.c | 8 ++++----
+ 1 file changed, 4 insertions(+), 4 deletions(-)
+
+--- a/arch/mips/pci/pci-lantiq.c
++++ b/arch/mips/pci/pci-lantiq.c
+@@ -124,14 +124,14 @@ static int ltq_pci_startup(struct platfo
+ 		clk_disable(clk_external);
+ 
+ 	/* setup reset gpio used by pci */
+-	reset_gpio = devm_gpiod_get_optional(&pdev->dev, "reset",
+-					     GPIOD_OUT_LOW);
++	reset_gpio = devm_gpiod_get_optional(&pdev->dev, "reset", GPIOD_ASIS);
+ 	error = PTR_ERR_OR_ZERO(reset_gpio);
+ 	if (error) {
+ 		dev_err(&pdev->dev, "failed to request gpio: %d\n", error);
+ 		return error;
+ 	}
+ 	gpiod_set_consumer_name(reset_gpio, "pci_reset");
++	gpiod_direction_output(reset_gpio, 1);
+ 
+ 	/* enable auto-switching between PCI and EBU */
+ 	ltq_pci_w32(0xa, PCI_CR_CLK_CTRL);
+@@ -194,10 +194,10 @@ static int ltq_pci_startup(struct platfo
+ 
+ 	/* toggle reset pin */
+ 	if (reset_gpio) {
+-		gpiod_set_value_cansleep(reset_gpio, 1);
++		gpiod_set_value_cansleep(reset_gpio, 0);
+ 		wmb();
+ 		mdelay(1);
+-		gpiod_set_value_cansleep(reset_gpio, 0);
++		gpiod_set_value_cansleep(reset_gpio, 1);
+ 	}
+ 	return 0;
+ }