[openwrt/openwrt] mediatek: correct address of MT753x switch IC
LEDE Commits
lede-commits at lists.infradead.org
Thu May 9 10:45:35 PDT 2024
hauke pushed a commit to openwrt/openwrt.git, branch main:
https://git.openwrt.org/9dae0ac0bc61385b77639fa1397c0fc302a0abeb
commit 9dae0ac0bc61385b77639fa1397c0fc302a0abeb
Author: Mieczyslaw Nalewaj <namiltd at yahoo.com>
AuthorDate: Thu May 9 13:11:16 2024 +0200
mediatek: correct address of MT753x switch IC
Continuation of commit 8b66f1a. Set the switch address on the MDIO bus to 31.
This is required for all boards currently working with the mt7530 DSA driver.
Fixes: #15419
Signed-off-by: Mieczyslaw Nalewaj <namiltd at yahoo.com>
---
target/linux/mediatek/dts/mt7622-netgear-wax206.dts | 4 ++--
target/linux/mediatek/dts/mt7623a-unielec-u7623-02.dtsi | 5 ++---
2 files changed, 4 insertions(+), 5 deletions(-)
diff --git a/target/linux/mediatek/dts/mt7622-netgear-wax206.dts b/target/linux/mediatek/dts/mt7622-netgear-wax206.dts
index ce1cd46d2d..524a498740 100644
--- a/target/linux/mediatek/dts/mt7622-netgear-wax206.dts
+++ b/target/linux/mediatek/dts/mt7622-netgear-wax206.dts
@@ -143,13 +143,13 @@
#address-cells = <1>;
#size-cells = <0>;
- switch at 0 {
+ switch at 1f {
compatible = "mediatek,mt7531";
+ reg = <31>;
#interrupt-cells = <1>;
interrupt-controller;
interrupt-parent = <&pio>;
interrupts = <53 IRQ_TYPE_LEVEL_HIGH>;
- reg = <0>;
reset-gpios = <&pio 54 GPIO_ACTIVE_HIGH>;
ports {
diff --git a/target/linux/mediatek/dts/mt7623a-unielec-u7623-02.dtsi b/target/linux/mediatek/dts/mt7623a-unielec-u7623-02.dtsi
index a4e443a0fb..fedf8b8596 100644
--- a/target/linux/mediatek/dts/mt7623a-unielec-u7623-02.dtsi
+++ b/target/linux/mediatek/dts/mt7623a-unielec-u7623-02.dtsi
@@ -121,17 +121,16 @@
#address-cells = <1>;
#size-cells = <0>;
- mt7530: switch at 0 {
- compatible = "mediatek,mt7530";
+ mt7530: switch at 1f {
};
};
};
&mt7530 {
compatible = "mediatek,mt7530";
+ reg = <31>;
#address-cells = <1>;
#size-cells = <0>;
- reg = <0>;
pinctrl-names = "default";
mediatek,mcm;
resets = <ðsys 2>;
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