[openwrt/openwrt] ramips: dts: rt3050: reset FE and ESW cores together

[LEDE Commits]

hauke pushed a commit to openwrt/openwrt.git, branch openwrt-22.03:
https://git.openwrt.org/0c84a1528894b1ce9b377a78199591c82e1acea5

commit 0c84a1528894b1ce9b377a78199591c82e1acea5
Author: Lech Perczak <lech.perczak at gmail.com>
AuthorDate: Tue Dec 12 00:22:04 2023 +0100

    ramips: dts: rt3050: reset FE and ESW cores together
    
    Failing to do so will cause the DMA engine to not initialize properly
    and fail to forward packets between them, and in some cases will cause
    spurious transmission with size exceeding allowed packet size, causing a
    kernel panic.
    
    This is behaviour of downstream driver as well, however I
    haven't observed bug reports about this SoC in the wild, so this
    commit's purpose is to align this chip with all other SoC's - MT7620
    were already using this arrangement.
    
    Fixes: 60fadae62b64 ("ramips: ethernet: ralink: move reset of the esw into the esw instead of fe")
    Signed-off-by: Lech Perczak <lech.perczak at gmail.com>
    
    (cherry picked from commit c5a399f372535886582f89f3da624ae7465c8ff4)
    Signed-off-by: Lech Perczak <lech.perczak at gmail.com>
---
 target/linux/ramips/dts/rt3050.dtsi | 8 ++++----
 1 file changed, 4 insertions(+), 4 deletions(-)

diff --git a/target/linux/ramips/dts/rt3050.dtsi b/target/linux/ramips/dts/rt3050.dtsi
index 492474fdc4..6077dd5008 100644
--- a/target/linux/ramips/dts/rt3050.dtsi
+++ b/target/linux/ramips/dts/rt3050.dtsi
@@ -306,8 +306,8 @@
 		compatible = "ralink,rt3050-eth";
 		reg = <0x10100000 0x10000>;
 
-		resets = <&rstctrl 21>;
-		reset-names = "fe";
+		resets = <&rstctrl 21>, <&rstctrl 23>;
+		reset-names = "fe", "esw";
 
 		interrupt-parent = <&cpuintc>;
 		interrupts = <5>;
@@ -319,8 +319,8 @@
 		compatible = "ralink,rt3050-esw";
 		reg = <0x10110000 0x8000>;
 
-		resets = <&rstctrl 23 &rstctrl 24>;
-		reset-names = "esw", "ephy";
+		resets = <&rstctrl 24>;
+		reset-names = "ephy";
 
 		interrupt-parent = <&intc>;
 		interrupts = <17>;