[openwrt/openwrt] ramips: dts: rt5350: reset FE and ESW cores together

[LEDE Commits]

hauke pushed a commit to openwrt/openwrt.git, branch openwrt-23.05:
https://git.openwrt.org/ee4a042483d28f1c866614ea8e7307d18a74af73

commit ee4a042483d28f1c866614ea8e7307d18a74af73
Author: Lech Perczak <lech.perczak at gmail.com>
AuthorDate: Tue Dec 12 00:25:02 2023 +0100

    ramips: dts: rt5350: reset FE and ESW cores together
    
    Failing to do so will cause the DMA engine to not initialize properly
    and fail to forward packets between them, and in some cases will cause
    spurious transmission with size exceeding allowed packet size, causing a
    kernel panic.
    
    This is behaviour of downstream driver as well, however I
    haven't observed bug reports about this SoC in the wild, so this
    commit's purpose is to align this chip with all other SoC's - MT7620
    were already using this arrangement.
    
    Fixes: #9284
    Fixes: 60fadae62b64 ("ramips: ethernet: ralink: move reset of the esw into the esw instead of fe")
    Signed-off-by: Lech Perczak <lech.perczak at gmail.com>
    (cherry picked from commit fc92fecfc7ddf19bbfd7d1305a29c666f00543af)
    Signed-off-by: Lech Perczak <lech.perczak at gmail.com>
---
 target/linux/ramips/dts/rt5350.dtsi | 8 ++++----
 1 file changed, 4 insertions(+), 4 deletions(-)

diff --git a/target/linux/ramips/dts/rt5350.dtsi b/target/linux/ramips/dts/rt5350.dtsi
index 090e755743..fe43de87ca 100644
--- a/target/linux/ramips/dts/rt5350.dtsi
+++ b/target/linux/ramips/dts/rt5350.dtsi
@@ -343,8 +343,8 @@
 		compatible = "ralink,rt5350-eth";
 		reg = <0x10100000 0x10000>;
 
-		resets = <&rstctrl 21>;
-		reset-names = "fe";
+		resets = <&rstctrl 21>, <&rstctrl 23>;
+		reset-names = "fe", "esw";
 
 		interrupt-parent = <&cpuintc>;
 		interrupts = <5>;
@@ -356,8 +356,8 @@
 		compatible = "ralink,rt5350-esw", "ralink,rt3050-esw";
 		reg = <0x10110000 0x8000>;
 
-		resets = <&rstctrl 23 &rstctrl 24>;
-		reset-names = "esw", "ephy";
+		resets = <&rstctrl 24>;
+		reset-names = "ephy";
 
 		interrupt-parent = <&intc>;
 		interrupts = <17>;