[openwrt/openwrt] mediatek: add support for BananaPi BPI-R4 board
LEDE Commits
lede-commits at lists.infradead.org
Thu Feb 15 11:35:07 PST 2024
dangole pushed a commit to openwrt/openwrt.git, branch main:
https://git.openwrt.org/f16dc4b42fb265affb2298e815a7ce0a13d60da6
commit f16dc4b42fb265affb2298e815a7ce0a13d60da6
Author: Daniel Golle <daniel at makrotopia.org>
AuthorDate: Sun Jul 23 12:38:15 2023 +0100
mediatek: add support for BananaPi BPI-R4 board
Hardware
--------
SOC: MediaTek MT7988A (4x Cortex-A73)
RAM: 4 GiB DDR4
Flash: 128 MiB Winbond SPI-NAND
MMC: 8 GiB eMMC *or* microSD (cannot be used both)
ETH: 4x 1GE (1x WAN, 3x LAN)
2x SFP+ (10G, 5G, 2.5G, 1G)
USB: on-board USB 3.2 4-port hub
1x USB 3.2 port (type A connector)
1x M.2 for 4G/5G modem
2x mPCIe for additional modems
WiFi: optional MediaTek MT7996 Wi-Fi 7 module
(using 2x PCIe gen3 x2 on the mPCIe slots and 12V power)
Installation
------------
1. Decompress and write the sdcard image to a micro SD card and use that
to boot the R4 (both dip switches in upper position).
2. Use the bootloader menu accessible via the serial console to install
to SPI-NAND.
3. Switch to boot from SPI-NAND and install to eMMC.
Known issues
------------
- The RST button is hard-wired to the SoC reset and can't be read
from software. This can be changed by modifying the board (ie.
moving a 0-ohm resistor). However, in order to maintain compatibility
with the board as it comes from factory the button isn't used by
OpenWrt and the WPS button is used as factory/reset button instead.
- various small things still need to be fixed in DT
Signed-off-by: Daniel Golle <daniel at makrotopia.org>
---
.../dts/mediatek/mt7988a-bananapi-bpi-r4-emmc.dtso | 62 ++++
.../dts/mediatek/mt7988a-bananapi-bpi-r4-rtc.dtso | 19 +
.../dts/mediatek/mt7988a-bananapi-bpi-r4-sd.dtso | 60 ++++
.../mt7988a-bananapi-bpi-r4-wifi-mt7996a.dtso | 99 ++++++
.../boot/dts/mediatek/mt7988a-bananapi-bpi-r4.dts | 395 +++++++++++++++++++++
.../arch/arm64/boot/dts/mediatek/mt7988a.dtsi | 8 +-
.../filogic/base-files/etc/board.d/01_leds | 6 +
.../filogic/base-files/etc/board.d/02_network | 3 +
.../filogic/base-files/lib/upgrade/platform.sh | 39 ++
target/linux/mediatek/filogic/config-6.1 | 3 +
target/linux/mediatek/image/filogic.mk | 45 +++
11 files changed, 735 insertions(+), 4 deletions(-)
diff --git a/target/linux/mediatek/files-6.1/arch/arm64/boot/dts/mediatek/mt7988a-bananapi-bpi-r4-emmc.dtso b/target/linux/mediatek/files-6.1/arch/arm64/boot/dts/mediatek/mt7988a-bananapi-bpi-r4-emmc.dtso
new file mode 100644
index 0000000000..4945185d69
--- /dev/null
+++ b/target/linux/mediatek/files-6.1/arch/arm64/boot/dts/mediatek/mt7988a-bananapi-bpi-r4-emmc.dtso
@@ -0,0 +1,62 @@
+// SPDX-License-Identifier: (GPL-2.0 OR MIT)
+/*
+ * Copyright (C) 2021 MediaTek Inc.
+ * Author: Frank Wunderlich <frank-w at public-files.de>
+ */
+
+/dts-v1/;
+/plugin/;
+
+/ {
+ compatible = "bananapi,bpi-r4", "mediatek,mt7988a";
+
+ fragment at 0 {
+ target-path = "/soc/mmc at 11230000";
+ __overlay__ {
+ pinctrl-names = "default", "state_uhs";
+ pinctrl-0 = <&mmc0_pins_emmc_51>;
+ pinctrl-1 = <&mmc0_pins_emmc_51>;
+ bus-width = <8>;
+ max-frequency = <200000000>;
+ cap-mmc-highspeed;
+ mmc-hs200-1_8v;
+ mmc-hs400-1_8v;
+ hs400-ds-delay = <0x12814>;
+ vqmmc-supply = <®_1p8v>;
+ vmmc-supply = <®_3p3v>;
+ non-removable;
+ no-sd;
+ no-sdio;
+ status = "okay";
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ card at 0 {
+ compatible = "mmc-card";
+ reg = <0>;
+
+ block {
+ compatible = "block-device";
+ partitions {
+ block-partition-env {
+ partname = "ubootenv";
+ nvmem-layout {
+ compatible = "u-boot,env-layout";
+ };
+ };
+ emmc_rootfs: block-partition-production {
+ partname = "production";
+ };
+ };
+ };
+ };
+ };
+ };
+
+ fragment at 2 {
+ target-path = "/chosen";
+ __overlay__ {
+ rootdisk-emmc = <&emmc_rootfs>;
+ };
+ };
+};
diff --git a/target/linux/mediatek/files-6.1/arch/arm64/boot/dts/mediatek/mt7988a-bananapi-bpi-r4-rtc.dtso b/target/linux/mediatek/files-6.1/arch/arm64/boot/dts/mediatek/mt7988a-bananapi-bpi-r4-rtc.dtso
new file mode 100644
index 0000000000..39910b8cfe
--- /dev/null
+++ b/target/linux/mediatek/files-6.1/arch/arm64/boot/dts/mediatek/mt7988a-bananapi-bpi-r4-rtc.dtso
@@ -0,0 +1,19 @@
+// SPDX-License-Identifier: (GPL-2.0 OR MIT)
+/*
+ * Copyright (C) 2023
+ * Author: Daniel Golle <daniel at makrotopia.org>
+ */
+
+/dts-v1/;
+/plugin/;
+
+/ {
+ compatible = "bananapi,bpi-r4", "mediatek,mt7988a";
+
+ fragment at 0 {
+ target = <&pcf8563>;
+ __overlay__ {
+ status = "okay";
+ };
+ };
+};
diff --git a/target/linux/mediatek/files-6.1/arch/arm64/boot/dts/mediatek/mt7988a-bananapi-bpi-r4-sd.dtso b/target/linux/mediatek/files-6.1/arch/arm64/boot/dts/mediatek/mt7988a-bananapi-bpi-r4-sd.dtso
new file mode 100644
index 0000000000..1f5e1491a4
--- /dev/null
+++ b/target/linux/mediatek/files-6.1/arch/arm64/boot/dts/mediatek/mt7988a-bananapi-bpi-r4-sd.dtso
@@ -0,0 +1,60 @@
+// SPDX-License-Identifier: (GPL-2.0 OR MIT)
+/*
+ * Copyright (C) 2023 MediaTek Inc.
+ * Author: Frank Wunderlich <frank-w at public-files.de>
+ */
+
+/dts-v1/;
+/plugin/;
+
+#include <dt-bindings/gpio/gpio.h>
+
+/ {
+ compatible = "bananapi,bpi-r4", "mediatek,mt7988a";
+
+ fragment at 1 {
+ target-path = "/soc/mmc at 11230000";
+ __overlay__ {
+ pinctrl-names = "default", "state_uhs";
+ pinctrl-0 = <&mmc0_pins_sdcard>;
+ pinctrl-1 = <&mmc0_pins_sdcard>;
+ cd-gpios = <&pio 12 GPIO_ACTIVE_LOW>;
+ bus-width = <4>;
+ max-frequency = <52000000>;
+ cap-sd-highspeed;
+ vmmc-supply = <®_3p3v>;
+ vqmmc-supply = <®_3p3v>;
+ no-mmc;
+ status = "okay";
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ card at 0 {
+ compatible = "mmc-card";
+ reg = <0>;
+
+ block {
+ compatible = "block-device";
+ partitions {
+ block-partition-env {
+ partname = "ubootenv";
+ nvmem-layout {
+ compatible = "u-boot,env-layout";
+ };
+ };
+ sd_rootfs: block-partition-production {
+ partname = "production";
+ };
+ };
+ };
+ };
+ };
+ };
+
+ fragment at 2 {
+ target-path = "/chosen";
+ __overlay__ {
+ rootdisk-sd = <&sd_rootfs>;
+ };
+ };
+};
diff --git a/target/linux/mediatek/files-6.1/arch/arm64/boot/dts/mediatek/mt7988a-bananapi-bpi-r4-wifi-mt7996a.dtso b/target/linux/mediatek/files-6.1/arch/arm64/boot/dts/mediatek/mt7988a-bananapi-bpi-r4-wifi-mt7996a.dtso
new file mode 100644
index 0000000000..8a029b149f
--- /dev/null
+++ b/target/linux/mediatek/files-6.1/arch/arm64/boot/dts/mediatek/mt7988a-bananapi-bpi-r4-wifi-mt7996a.dtso
@@ -0,0 +1,99 @@
+// SPDX-License-Identifier: (GPL-2.0 OR MIT)
+/dts-v1/;
+/plugin/;
+
+#include <dt-bindings/gpio/gpio.h>
+
+/ {
+ compatible = "bananapi,bpi-r4", "mediatek,mt7988a";
+
+ fragment at 0 {
+ target-path = "/";
+ __overlay__ {
+ wifi_12v: regulator-wifi-12v {
+ compatible = "regulator-fixed";
+ regulator-name = "wifi";
+ regulator-min-microvolt = <12000000>;
+ regulator-max-microvolt = <12000000>;
+ gpio = <&pio 4 GPIO_ACTIVE_HIGH>;
+ enable-active-high;
+ regulator-always-on;
+ };
+ };
+ };
+
+ fragment at 1 {
+ target = <&i2c_wifi>;
+ __overlay__ {
+ // 5G WIFI MAC Address EEPROM
+ wifi_eeprom at 51 {
+ compatible = "atmel,24c02";
+ reg = <0x51>;
+ address-bits = <8>;
+ page-size = <8>;
+ size = <256>;
+
+ nvmem-layout {
+ compatible = "fixed-layout";
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ macaddr_5g: macaddr at 0 {
+ reg = <0x0 0x6>;
+ };
+ };
+ };
+
+ // 6G WIFI MAC Address EEPROM
+ wifi_eeprom at 52 {
+ compatible = "atmel,24c02";
+ reg = <0x52>;
+ address-bits = <8>;
+ page-size = <8>;
+ size = <256>;
+
+ nvmem-layout {
+ compatible = "fixed-layout";
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ macaddr_6g: macaddr at 0 {
+ reg = <0x0 0x6>;
+ };
+ };
+ };
+ };
+ };
+
+ fragment at 2 {
+ target = <&pcie0>;
+ __overlay__ {
+ pcie at 0,0 {
+ reg = <0x0000 0 0 0 0>;
+
+ wifi at 0,0 {
+ compatible = "mediatek,mt76";
+ reg = <0x0000 0 0 0 0>;
+ nvmem-cell-names = "mac-address";
+ nvmem-cells = <&macaddr_5g>;
+ };
+ };
+ };
+ };
+
+ fragment at 3 {
+ target = <&pcie1>;
+ __overlay__ {
+ pcie at 0,0 {
+ reg = <0x0000 0 0 0 0>;
+
+ wifi at 0,0 {
+ compatible = "mediatek,mt76";
+ reg = <0x0000 0 0 0 0>;
+ nvmem-cell-names = "mac-address";
+ nvmem-cells = <&macaddr_6g>;
+ };
+ };
+ };
+ };
+};
diff --git a/target/linux/mediatek/files-6.1/arch/arm64/boot/dts/mediatek/mt7988a-bananapi-bpi-r4.dts b/target/linux/mediatek/files-6.1/arch/arm64/boot/dts/mediatek/mt7988a-bananapi-bpi-r4.dts
new file mode 100644
index 0000000000..b4bf3400ff
--- /dev/null
+++ b/target/linux/mediatek/files-6.1/arch/arm64/boot/dts/mediatek/mt7988a-bananapi-bpi-r4.dts
@@ -0,0 +1,395 @@
+// SPDX-License-Identifier: (GPL-2.0 OR MIT)
+/*
+ * Copyright (C) 2022 MediaTek Inc.
+ * Author: Sam.Shih <sam.shih at mediatek.com>
+ */
+
+/dts-v1/;
+#include "mt7988a.dtsi"
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/input/input.h>
+#include <dt-bindings/leds/common.h>
+#include <dt-bindings/regulator/richtek,rt5190a-regulator.h>
+
+/ {
+ model = "Bananapi BPI-R4";
+ compatible = "bananapi,bpi-r4",
+ "mediatek,mt7988";
+
+ aliases {
+ serial0 = &uart0;
+ led-boot = &led_green;
+ led-failsafe = &led_green;
+ led-running = &led_green;
+ led-upgrade = &led_green;
+ };
+
+ chosen {
+ stdout-path = &uart0;
+ bootargs = "console=ttyS0,115200n1 loglevel=8 pci=pcie_bus_perf ubi.block=0,fit root=/dev/fit0";
+ rootdisk-spim-nand = <&ubi_rootfs>;
+ };
+
+ memory {
+ reg = <0x00 0x40000000 0x00 0x10000000>;
+ };
+
+ /* SFP1 cage (WAN) */
+ sfp1: sfp1 {
+ compatible = "sff,sfp";
+ i2c-bus = <&i2c_sfp1>;
+ los-gpios = <&pio 54 GPIO_ACTIVE_HIGH>;
+ mod-def0-gpios = <&pio 82 GPIO_ACTIVE_LOW>;
+ tx-disable-gpios = <&pio 70 GPIO_ACTIVE_HIGH>;
+ tx-fault-gpios = <&pio 69 GPIO_ACTIVE_HIGH>;
+ rate-select0-gpios = <&pio 21 GPIO_ACTIVE_LOW>;
+ maximum-power-milliwatt = <3000>;
+ };
+
+ /* SFP2 cage (LAN) */
+ sfp2: sfp2 {
+ compatible = "sff,sfp";
+ i2c-bus = <&i2c_sfp2>;
+ los-gpios = <&pio 2 GPIO_ACTIVE_HIGH>;
+ mod-def0-gpios = <&pio 83 GPIO_ACTIVE_LOW>;
+ tx-disable-gpios = <&pio 0 GPIO_ACTIVE_HIGH>;
+ tx-fault-gpios = <&pio 1 GPIO_ACTIVE_HIGH>;
+ rate-select0-gpios = <&pio 3 GPIO_ACTIVE_LOW>;
+ maximum-power-milliwatt = <3000>;
+ };
+
+ gpio-keys {
+ compatible = "gpio-keys";
+
+ wps {
+ label = "WPS";
+ linux,code = <KEY_RESTART>;
+ gpios = <&pio 14 GPIO_ACTIVE_LOW>;
+ };
+ };
+
+ gpio-leds {
+ compatible = "gpio-leds";
+
+ led_green: led-green {
+ function = LED_FUNCTION_STATUS;
+ color = <LED_COLOR_ID_GREEN>;
+ gpios = <&pio 79 GPIO_ACTIVE_HIGH>;
+ default-state = "on";
+ };
+
+ led_blue: led-blue {
+ function = LED_FUNCTION_WPS;
+ color = <LED_COLOR_ID_BLUE>;
+ gpios = <&pio 63 GPIO_ACTIVE_HIGH>;
+ default-state = "off";
+ };
+ };
+};
+
+ð {
+ status = "okay";
+};
+
+&gmac0 {
+ status = "okay";
+};
+
+&gmac1 {
+ sfp = <&sfp2>;
+ managed = "in-band-status";
+ phy-mode = "usxgmii";
+ status = "okay";
+};
+
+&gmac2 {
+ sfp = <&sfp1>;
+ managed = "in-band-status";
+ phy-mode = "usxgmii";
+ status = "okay";
+};
+
+&switch {
+ status = "okay";
+};
+
+&gsw_phy0 {
+ pinctrl-names = "gbe-led";
+ pinctrl-0 = <&gbe0_led0_pins>;
+};
+
+&gsw_port0 {
+ label = "wan";
+};
+
+&gsw_phy0_led0 {
+ status = "okay";
+ color = <LED_COLOR_ID_GREEN>;
+};
+
+&gsw_phy1 {
+ pinctrl-names = "gbe-led";
+ pinctrl-0 = <&gbe1_led0_pins>;
+};
+
+&gsw_phy1_led0 {
+ status = "okay";
+ color = <LED_COLOR_ID_GREEN>;
+};
+
+&gsw_phy2 {
+ pinctrl-names = "gbe-led";
+ pinctrl-0 = <&gbe2_led0_pins>;
+};
+
+&gsw_phy2_led0 {
+ status = "okay";
+ color = <LED_COLOR_ID_GREEN>;
+};
+
+&gsw_phy3 {
+ pinctrl-names = "gbe-led";
+ pinctrl-0 = <&gbe3_led0_pins>;
+};
+
+&gsw_phy3_led0 {
+ status = "okay";
+ color = <LED_COLOR_ID_GREEN>;
+};
+
+&cpu0 {
+ proc-supply = <&rt5190_buck3>;
+};
+
+&cpu1 {
+ proc-supply = <&rt5190_buck3>;
+};
+
+&cpu2 {
+ proc-supply = <&rt5190_buck3>;
+};
+
+&cpu3 {
+ proc-supply = <&rt5190_buck3>;
+};
+
+&cci {
+ proc-supply = <&rt5190_buck3>;
+};
+
+&i2c0 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&i2c0_pins>;
+ status = "okay";
+
+ rt5190a_64: rt5190a at 64 {
+ compatible = "richtek,rt5190a";
+ reg = <0x64>;
+ vin2-supply = <&rt5190_buck1>;
+ vin3-supply = <&rt5190_buck1>;
+ vin4-supply = <&rt5190_buck1>;
+
+ regulators {
+ rt5190_buck1: buck1 {
+ regulator-name = "rt5190a-buck1";
+ regulator-min-microvolt = <5090000>;
+ regulator-max-microvolt = <5090000>;
+ regulator-allowed-modes =
+ <RT5190A_OPMODE_AUTO RT5190A_OPMODE_FPWM>;
+ regulator-boot-on;
+ regulator-always-on;
+ };
+ buck2 {
+ regulator-name = "vcore";
+ regulator-min-microvolt = <600000>;
+ regulator-max-microvolt = <1400000>;
+ regulator-boot-on;
+ regulator-always-on;
+ };
+ rt5190_buck3: buck3 {
+ regulator-name = "vproc";
+ regulator-min-microvolt = <600000>;
+ regulator-max-microvolt = <1400000>;
+ regulator-boot-on;
+ };
+ buck4 {
+ regulator-name = "rt5190a-buck4";
+ regulator-min-microvolt = <850000>;
+ regulator-max-microvolt = <850000>;
+ regulator-allowed-modes =
+ <RT5190A_OPMODE_AUTO RT5190A_OPMODE_FPWM>;
+ regulator-boot-on;
+ regulator-always-on;
+ };
+ ldo {
+ regulator-name = "rt5190a-ldo";
+ regulator-min-microvolt = <1200000>;
+ regulator-max-microvolt = <1200000>;
+ regulator-boot-on;
+ regulator-always-on;
+ };
+ };
+ };
+};
+
+&i2c2 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&i2c2_1_pins>;
+ status = "okay";
+
+ pca9545: i2c-switch at 70 {
+ reg = <0x70>;
+ compatible = "nxp,pca9545";
+ reset-gpios = <&pio 5 GPIO_ACTIVE_LOW>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ i2c_rtc: i2c at 0 { //eeprom,rtc,ngff
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <0>;
+
+ eeprom at 50 {
+ compatible = "atmel,24c02";
+ reg = <0x50>;
+ address-bits = <8>;
+ page-size = <8>;
+ size = <256>;
+ };
+
+ eeprom at 57 {
+ compatible = "atmel,24c02";
+ reg = <0x57>;
+ address-bits = <8>;
+ page-size = <8>;
+ size = <256>;
+ };
+
+ pcf8563: rtc at 51 {
+ compatible = "nxp,pcf8563";
+ reg = <0x51>;
+ status = "disabled";
+ };
+ };
+
+ i2c_sfp1: i2c at 1 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <1>;
+ };
+
+ i2c_sfp2: i2c at 2 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <2>;
+ };
+
+ i2c_wifi: i2c at 3 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <3>;
+ };
+ };
+};
+
+/* mPCIe SIM2 */
+&pcie0 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pcie0_pins>;
+ status = "okay";
+};
+
+/* mPCIe SIM3 */
+&pcie1 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pcie1_pins>;
+ status = "okay";
+};
+
+/* M.2 key-B SIM1 */
+&pcie2 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pcie2_pins>;
+ status = "okay";
+};
+
+/* M.2 key-M SSD */
+&pcie3 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pcie3_pins>;
+ status = "okay";
+};
+
+&ssusb1 {
+ status = "okay";
+};
+
+&tphy {
+ status = "okay";
+};
+
+&spi0 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&spi0_flash_pins>;
+ status = "okay";
+
+ spi_nand: spi_nand at 0 {
+ compatible = "spi-nand";
+ reg = <0>;
+ spi-max-frequency = <52000000>;
+ spi-tx-buswidth = <4>;
+ spi-rx-buswidth = <4>;
+ };
+};
+
+&spi_nand {
+ partitions {
+ compatible = "fixed-partitions";
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ partition at 0 {
+ label = "bl2";
+ reg = <0x0 0x200000>;
+ read-only;
+ };
+
+ partition at 200000 {
+ label = "ubi";
+ reg = <0x200000 0x7e00000>;
+ compatible = "linux,ubi";
+
+ volumes {
+ ubi-volume-ubootenv {
+ volname = "ubootenv";
+ nvmem-layout {
+ compatible = "u-boot,env-redundant-bool-layout";
+ };
+ };
+
+ ubi-volume-ubootenv2 {
+ volname = "ubootenv2";
+ nvmem-layout {
+ compatible = "u-boot,env-redundant-bool-layout";
+ };
+ };
+
+ ubi_rootfs: ubi-volume-fit {
+ volname = "fit";
+ };
+ };
+ };
+ };
+};
+
+&uart0 {
+ status = "okay";
+};
+
+&watchdog {
+ status = "okay";
+};
+
+&xphy {
+ status = "okay";
+};
diff --git a/target/linux/mediatek/files-6.1/arch/arm64/boot/dts/mediatek/mt7988a.dtsi b/target/linux/mediatek/files-6.1/arch/arm64/boot/dts/mediatek/mt7988a.dtsi
index 8f1c1ddc9d..76278281df 100644
--- a/target/linux/mediatek/files-6.1/arch/arm64/boot/dts/mediatek/mt7988a.dtsi
+++ b/target/linux/mediatek/files-6.1/arch/arm64/boot/dts/mediatek/mt7988a.dtsi
@@ -1230,28 +1230,28 @@
#address-cells = <1>;
#size-cells = <0>;
- port at 0 {
+ gsw_port0: port at 0 {
reg = <0>;
label = "lan0";
phy-mode = "internal";
phy-handle = <&gsw_phy0>;
};
- port at 1 {
+ gsw_port1: port at 1 {
reg = <1>;
label = "lan1";
phy-mode = "internal";
phy-handle = <&gsw_phy1>;
};
- port at 2 {
+ gsw_port2: port at 2 {
reg = <2>;
label = "lan2";
phy-mode = "internal";
phy-handle = <&gsw_phy2>;
};
- port at 3 {
+ gsw_port3: port at 3 {
reg = <3>;
label = "lan3";
phy-mode = "internal";
diff --git a/target/linux/mediatek/filogic/base-files/etc/board.d/01_leds b/target/linux/mediatek/filogic/base-files/etc/board.d/01_leds
index b9fac1bebf..3622bf9a71 100644
--- a/target/linux/mediatek/filogic/base-files/etc/board.d/01_leds
+++ b/target/linux/mediatek/filogic/base-files/etc/board.d/01_leds
@@ -12,6 +12,12 @@ confiabits,mt7981)
ucidef_set_led_netdev "lan3" "lan3" "blue:lan-3" "lan3" "link tx rx"
ucidef_set_led_netdev "wan" "wan" "blue:wan" "wan" "link tx rx"
;;
+bananapi,bpi-r4)
+ ucidef_set_led_netdev "wan" "wan" "mt7530-0:00:green:lan" "wan" "link tx rx"
+ ucidef_set_led_netdev "lan1" "lan1" "mt7530-0:01:green:lan" "lan1" "link tx rx"
+ ucidef_set_led_netdev "lan2" "lan2" "mt7530-0:02:green:lan" "lan2" "link tx rx"
+ ucidef_set_led_netdev "lan3" "lan3" "mt7530-0:03:green:lan" "lan3" "link tx rx"
+ ;;
cudy,wr3000-v1)
ucidef_set_led_netdev "wan" "wan" "blue:wan" "wan"
;;
diff --git a/target/linux/mediatek/filogic/base-files/etc/board.d/02_network b/target/linux/mediatek/filogic/base-files/etc/board.d/02_network
index a9cf0d2305..01240d003a 100644
--- a/target/linux/mediatek/filogic/base-files/etc/board.d/02_network
+++ b/target/linux/mediatek/filogic/base-files/etc/board.d/02_network
@@ -35,6 +35,9 @@ mediatek_setup_interfaces()
bananapi,bpi-r3)
ucidef_set_interfaces_lan_wan "lan1 lan2 lan3 lan4 sfp2" "eth1 wan"
;;
+ bananapi,bpi-r4)
+ ucidef_set_interfaces_lan_wan "lan1 lan2 lan3 eth1" "wan eth2"
+ ;;
cmcc,rax3000m|\
h3c,magic-nx30-pro|\
zbtlink,zbt-z8103ax)
diff --git a/target/linux/mediatek/filogic/base-files/lib/upgrade/platform.sh b/target/linux/mediatek/filogic/base-files/lib/upgrade/platform.sh
index 97c09f35a8..889a1e2bd1 100755
--- a/target/linux/mediatek/filogic/base-files/lib/upgrade/platform.sh
+++ b/target/linux/mediatek/filogic/base-files/lib/upgrade/platform.sh
@@ -1,4 +1,5 @@
REQUIRE_IMAGE_METADATA=1
+RAMFS_COPY_BIN='fitblk'
asus_initial_setup()
{
@@ -59,6 +60,21 @@ xiaomi_initial_setup()
esac
}
+platform_get_bootdev() {
+ local rootdisk="$(cat /sys/firmware/devicetree/base/chosen/rootdisk)"
+ local handle bootdev
+ for handle in /sys/class/block/*/of_node/phandle /sys/class/block/*/device/of_node/phandle; do
+ [ ! -e "$handle" ] && continue
+ if [ "$rootdisk" = "$(cat $handle)" ]; then
+ bootdev="${handle%/of_node/phandle}"
+ bootdev="${bootdev%/device}"
+ bootdev="${bootdev#/sys/class/block/}"
+ echo "$bootdev"
+ break
+ fi
+ done
+}
+
platform_do_upgrade() {
local board=$(board_name)
@@ -99,6 +115,21 @@ platform_do_upgrade() {
;;
esac
;;
+ bananapi,bpi-r4)
+ [ -e /dev/fit0 ] && fitblk /dev/fit0
+ [ -e /dev/fitrw ] && fitblk /dev/fitrw
+ bootdev="$(platform_get_bootdev)"
+ case "$bootdev" in
+ mmcblk*)
+ EMMC_KERN_DEV="/dev/$bootdev"
+ emmc_do_upgrade "$1"
+ ;;
+ ubiblock*)
+ CI_KERNPART="fit"
+ nand_do_upgrade "$1"
+ ;;
+ esac
+ ;;
cmcc,rax3000m)
case "$(cmdline_get_var root)" in
/dev/mmc*)
@@ -175,6 +206,7 @@ platform_check_image() {
case "$board" in
bananapi,bpi-r3|\
+ bananapi,bpi-r4|\
cmcc,rax3000m)
[ "$magic" != "d00dfeed" ] && {
echo "Invalid image type."
@@ -201,6 +233,13 @@ platform_copy_config() {
;;
esac
;;
+ bananapi,bpi-r4)
+ case "$(platform_get_bootdev)" in
+ mmcblk*)
+ emmc_copy_config
+ ;;
+ esac
+ ;;
acer,predator-w6|\
glinet,gl-mt2500|\
glinet,gl-mt6000|\
diff --git a/target/linux/mediatek/filogic/config-6.1 b/target/linux/mediatek/filogic/config-6.1
index b75ef6b610..9e27cd830c 100644
--- a/target/linux/mediatek/filogic/config-6.1
+++ b/target/linux/mediatek/filogic/config-6.1
@@ -44,6 +44,7 @@ CONFIG_AUDIT_ARCH_COMPAT_GENERIC=y
CONFIG_BLK_DEV_LOOP=y
CONFIG_BLK_DEV_SD=y
CONFIG_BLK_MQ_PCI=y
+CONFIG_BLK_NVMEM=y
CONFIG_BLK_PM=y
CONFIG_BSD_PROCESS_ACCT=y
CONFIG_BSD_PROCESS_ACCT_V3=y
@@ -254,6 +255,7 @@ CONFIG_MTD_UBI=y
CONFIG_MTD_UBI_BEB_LIMIT=20
CONFIG_MTD_UBI_BLOCK=y
CONFIG_MTD_UBI_FASTMAP=y
+CONFIG_MTD_UBI_NVMEM=y
CONFIG_MTD_UBI_WL_THRESHOLD=4096
# CONFIG_MTK_CMDQ is not set
# CONFIG_MTK_CQDMA is not set
@@ -462,6 +464,7 @@ CONFIG_TREE_RCU=y
CONFIG_TREE_SRCU=y
CONFIG_UBIFS_FS=y
# CONFIG_UCLAMP_TASK is not set
+CONFIG_UIMAGE_FIT_BLK=y
# CONFIG_UNMAP_KERNEL_AT_EL0 is not set
CONFIG_USB_SUPPORT=y
CONFIG_VMAP_STACK=y
diff --git a/target/linux/mediatek/image/filogic.mk b/target/linux/mediatek/image/filogic.mk
index 90a0e91f02..0d36199f0d 100644
--- a/target/linux/mediatek/image/filogic.mk
+++ b/target/linux/mediatek/image/filogic.mk
@@ -272,6 +272,51 @@ endif
endef
TARGET_DEVICES += bananapi_bpi-r3
+define Device/bananapi_bpi-r4
+ DEVICE_VENDOR := Bananapi
+ DEVICE_MODEL := BPi-R4
+ DEVICE_DTS := mt7988a-bananapi-bpi-r4
+ DEVICE_DTS_CONFIG := config-mt7988a-bananapi-bpi-r4
+ DEVICE_DTS_DIR := $(DTS_DIR)/
+ DEVICE_DTS_LOADADDR := 0x45f00000
+ DEVICE_DTS_OVERLAY:= mt7988a-bananapi-bpi-r4-emmc mt7988a-bananapi-bpi-r4-rtc mt7988a-bananapi-bpi-r4-sd mt7988a-bananapi-bpi-r4-wifi-mt7996a
+ DEVICE_DTC_FLAGS := --pad 4096
+ DEVICE_PACKAGES := fitblk kmod-hwmon-pwmfan kmod-i2c-mux-pca954x kmod-eeprom-at24 kmod-mt7996-firmware \
+ kmod-rtc-pcf8563 kmod-sfp kmod-usb3 e2fsprogs f2fsck mkf2fs
+ IMAGES := sysupgrade.itb
+ KERNEL_LOADADDR := 0x46000000
+ KERNEL_INITRAMFS_SUFFIX := -recovery.itb
+ ARTIFACTS := \
+ emmc-preloader.bin emmc-bl31-uboot.fip \
+ sdcard.img.gz \
+ snand-preloader.bin snand-bl31-uboot.fip
+ ARTIFACT/emmc-preloader.bin := mt7988-bl2 emmc-comb
+ ARTIFACT/emmc-bl31-uboot.fip := mt7988-bl31-uboot bananapi_bpi-r4-emmc
+ ARTIFACT/snand-preloader.bin := mt7988-bl2 spim-nand-ubi-comb
+ ARTIFACT/snand-bl31-uboot.fip := mt7988-bl31-uboot bananapi_bpi-r4-snand
+ ARTIFACT/sdcard.img.gz := mt798x-gpt sdmmc |\
+ pad-to 17k | mt7988-bl2 sdmmc-comb |\
+ pad-to 6656k | mt7988-bl31-uboot bananapi_bpi-r4-sdmmc |\
+ $(if $(CONFIG_TARGET_ROOTFS_INITRAMFS),\
+ pad-to 12M | append-image-stage initramfs-recovery.itb | check-size 44m |\
+ ) \
+ pad-to 44M | mt7988-bl2 spim-nand-ubi-comb |\
+ pad-to 45M | mt7988-bl31-uboot bananapi_bpi-r4-snand |\
+ pad-to 51M | mt7988-bl2 emmc-comb |\
+ pad-to 52M | mt7988-bl31-uboot bananapi_bpi-r4-emmc |\
+ pad-to 56M | mt798x-gpt emmc |\
+ $(if $(CONFIG_TARGET_ROOTFS_SQUASHFS),\
+ pad-to 64M | append-image squashfs-sysupgrade.itb | check-size |\
+ ) \
+ gzip
+ IMAGE_SIZE := $$(shell expr 64 + $$(CONFIG_TARGET_ROOTFS_PARTSIZE))m
+ KERNEL := kernel-bin | gzip
+ KERNEL_INITRAMFS := kernel-bin | lzma | \
+ fit lzma $$(KDIR)/image-$$(firstword $$(DEVICE_DTS)).dtb with-initrd | pad-to 64k
+ IMAGE/sysupgrade.itb := append-kernel | fit gzip $$(KDIR)/image-$$(firstword $$(DEVICE_DTS)).dtb external-with-rootfs | pad-rootfs | append-metadata
+endef
+TARGET_DEVICES += bananapi_bpi-r4
+
define Device/cetron_ct3003
DEVICE_VENDOR := Cetron
DEVICE_MODEL := CT3003
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