[openwrt/openwrt] qualcommax: ipq807x: create generic Linksys MX4x00 dts
LEDE Commits
lede-commits at lists.infradead.org
Tue Dec 31 08:44:24 PST 2024
robimarko pushed a commit to openwrt/openwrt.git, branch main:
https://git.openwrt.org/c9b324d3ac084253171ac6233ca12cb4feacf36c
commit c9b324d3ac084253171ac6233ca12cb4feacf36c
Author: Paweł Owoc <frut3k7 at gmail.com>
AuthorDate: Fri Jul 26 22:21:02 2024 +0200
qualcommax: ipq807x: create generic Linksys MX4x00 dts
Create a generic Linksys MX4x00 dts file and extract the specific configuration
for MX4200v1/v2 to a new file.
Signed-off-by: Paweł Owoc <frut3k7 at gmail.com>
Link: https://github.com/openwrt/openwrt/pull/16070
Signed-off-by: Robert Marko <robimarko at gmail.com>
---
.../arch/arm64/boot/dts/qcom/ipq8174-mx4200.dtsi | 198 +-------------------
.../arch/arm64/boot/dts/qcom/ipq8174-mx4x00.dtsi | 204 +++++++++++++++++++++
2 files changed, 209 insertions(+), 193 deletions(-)
diff --git a/target/linux/qualcommax/files/arch/arm64/boot/dts/qcom/ipq8174-mx4200.dtsi b/target/linux/qualcommax/files/arch/arm64/boot/dts/qcom/ipq8174-mx4200.dtsi
index 3698db7318..5867cd4222 100644
--- a/target/linux/qualcommax/files/arch/arm64/boot/dts/qcom/ipq8174-mx4200.dtsi
+++ b/target/linux/qualcommax/files/arch/arm64/boot/dts/qcom/ipq8174-mx4200.dtsi
@@ -1,79 +1,16 @@
// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
/* Copyright (c) 2023, Mohammad Sayful Islam <Sayf.mohammad01 at gmail.com> */
-#include "ipq8074.dtsi"
-#include "ipq8074-ac-cpu.dtsi"
-#include "ipq8074-ess.dtsi"
-#include <dt-bindings/gpio/gpio.h>
-#include <dt-bindings/input/input.h>
-#include <dt-bindings/leds/common.h>
+#include "ipq8174-mx4x00.dtsi"
/ {
-
aliases {
- serial0 = &blsp1_uart5;
- serial1 = &blsp1_uart3;
- /*
- * Aliases as required by u-boot
- * to patch MAC addresses
- */
- ethernet1 = &dp2;
- ethernet2 = &dp3;
ethernet3 = &dp4;
ethernet4 = &dp5;
- led-boot = &led_system_blue;
- led-running = &led_system_blue;
- led-failsafe = &led_system_red;
- led-upgrade = &led_system_green;
- };
-
- chosen {
- stdout-path = "serial0:115200n8";
- };
-
- keys {
- compatible = "gpio-keys";
- pinctrl-0 = <&button_pins>;
- pinctrl-names = "default";
-
- reset-button {
- label = "reset";
- gpios = <&tlmm 52 GPIO_ACTIVE_LOW>;
- linux,code = <KEY_RESTART>;
- };
-
- wps-button {
- label = "wps";
- gpios = <&tlmm 67 GPIO_ACTIVE_LOW>;
- linux,code = <KEY_WPS_BUTTON>;
- };
};
};
&tlmm {
- button_pins: button-state {
- pins = "gpio52", "gpio67";
- function = "gpio";
- drive-strength = <8>;
- bias-pull-up;
- };
-
- mdio_pins: mdio-state {
- mdc-pins {
- pins = "gpio68";
- function = "mdc";
- drive-strength = <8>;
- bias-pull-up;
- };
-
- mdio-pins {
- pins = "gpio69";
- function = "mdio";
- drive-strength = <8>;
- bias-pull-up;
- };
- };
-
iot_pins: iot-state {
recovery-pins {
pins = "gpio22";
@@ -98,26 +35,6 @@
/* Silicon Labs EFR32MG21 IoT */
};
-&blsp1_uart5 {
- status = "okay";
-};
-
-&prng {
- status = "okay";
-};
-
-&cryptobam {
- status = "okay";
-};
-
-&crypto {
- status = "okay";
-};
-
-&qpic_bam {
- status = "okay";
-};
-
&qpic_nand {
status = "okay";
@@ -288,21 +205,25 @@
label = "alt_rootfs";
reg = <0xac80000 0x9000000>;
};
+
partition at 13c80000 {
label = "sysdiag";
reg = <0x13c80000 0x200000>;
read-only;
};
+
partition at 13e80000 {
label = "0:ethphyfw";
reg = <0x13e80000 0x80000>;
read-only;
};
+
partition at 13f00000 {
label = "syscfg";
reg = <0x13f00000 0xb800000>;
read-only;
};
+
partition at 1f700000 {
label = "0:wififw";
reg = <0x1f700000 0x900000>;
@@ -312,102 +233,6 @@
};
};
-&blsp1_i2c2 {
- status = "okay";
-
- led-controller at 62 {
- compatible = "nxp,pca9633";
- #address-cells = <1>;
- #size-cells = <0>;
- reg = <0x62>;
- nxp,hw-blink;
-
- led_system_red: led at 0 {
- reg = <0>;
- color = <LED_COLOR_ID_RED>;
- function = LED_FUNCTION_STATUS;
- };
-
- led_system_green: led at 1 {
- reg = <1>;
- color = <LED_COLOR_ID_GREEN>;
- function = LED_FUNCTION_STATUS;
- };
-
- led_system_blue: led at 2 {
- reg = <2>;
- color = <LED_COLOR_ID_BLUE>;
- function = LED_FUNCTION_STATUS;
- };
- };
-};
-
-&mdio {
- status = "okay";
-
- pinctrl-0 = <&mdio_pins>;
- pinctrl-names = "default";
- reset-gpios = <&tlmm 37 GPIO_ACTIVE_LOW>;
-
- ethernet-phy-package at 0 {
- #address-cells = <1>;
- #size-cells = <0>;
- compatible = "qcom,qca8075-package";
- reg = <0>;
-
- qca8075_1: ethernet-phy at 1 {
- compatible = "ethernet-phy-ieee802.3-c22";
- reg = <1>;
- };
-
- qca8075_2: ethernet-phy at 2 {
- compatible = "ethernet-phy-ieee802.3-c22";
- reg = <2>;
- };
-
- qca8075_3: ethernet-phy at 3 {
- compatible = "ethernet-phy-ieee802.3-c22";
- reg = <3>;
- };
-
- qca8075_4: ethernet-phy at 4 {
- compatible = "ethernet-phy-ieee802.3-c22";
- reg = <4>;
- };
- };
-};
-
-&switch {
- status = "okay";
-
- switch_lan_bmp = <(ESS_PORT3 | ESS_PORT4 | ESS_PORT5)>; /* lan port bitmap */
- switch_wan_bmp = <ESS_PORT2>; /* wan port bitmap */
- switch_mac_mode = <MAC_MODE_PSGMII>; /* mac mode for uniphy instance0*/
-
- qcom,port_phyinfo {
- port at 2 {
- port_id = <2>;
- phy_address = <1>;
- };
- port at 3 {
- port_id = <3>;
- phy_address = <2>;
- };
- port at 4 {
- port_id = <4>;
- phy_address = <3>;
- };
- port at 5 {
- port_id = <5>;
- phy_address = <4>;
- };
- };
-};
-
-&edma {
- status = "okay";
-};
-
&dp2 {
status = "okay";
phy-handle = <&qca8075_1>;
@@ -431,16 +256,3 @@
phy-handle = <&qca8075_4>;
label = "lan3";
};
-
-&ssphy_0 {
- status = "okay";
-};
-
-&qusb_phy_0 {
- status = "okay";
-};
-
-&usb_0 {
- status = "okay";
-};
-
diff --git a/target/linux/qualcommax/files/arch/arm64/boot/dts/qcom/ipq8174-mx4x00.dtsi b/target/linux/qualcommax/files/arch/arm64/boot/dts/qcom/ipq8174-mx4x00.dtsi
new file mode 100644
index 0000000000..84e68dae35
--- /dev/null
+++ b/target/linux/qualcommax/files/arch/arm64/boot/dts/qcom/ipq8174-mx4x00.dtsi
@@ -0,0 +1,204 @@
+// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
+/* Copyright (c) 2023, Mohammad Sayful Islam <Sayf.mohammad01 at gmail.com> */
+
+#include "ipq8074.dtsi"
+#include "ipq8074-ac-cpu.dtsi"
+#include "ipq8074-ess.dtsi"
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/input/input.h>
+#include <dt-bindings/leds/common.h>
+
+/ {
+ aliases {
+ serial0 = &blsp1_uart5;
+ serial1 = &blsp1_uart3;
+ /*
+ * Aliases as required by u-boot
+ * to patch MAC addresses
+ */
+ ethernet1 = &dp2;
+ ethernet2 = &dp3;
+ led-boot = &led_system_blue;
+ led-running = &led_system_blue;
+ led-failsafe = &led_system_red;
+ led-upgrade = &led_system_green;
+ };
+
+ chosen {
+ stdout-path = "serial0:115200n8";
+ };
+
+ keys {
+ compatible = "gpio-keys";
+ pinctrl-0 = <&button_pins>;
+ pinctrl-names = "default";
+
+ reset-button {
+ label = "reset";
+ gpios = <&tlmm 52 GPIO_ACTIVE_LOW>;
+ linux,code = <KEY_RESTART>;
+ };
+
+ wps-button {
+ label = "wps";
+ gpios = <&tlmm 67 GPIO_ACTIVE_LOW>;
+ linux,code = <KEY_WPS_BUTTON>;
+ };
+ };
+};
+
+&tlmm {
+ button_pins: button-state {
+ pins = "gpio52", "gpio67";
+ function = "gpio";
+ drive-strength = <8>;
+ bias-pull-up;
+ };
+
+ mdio_pins: mdio-state {
+ mdc-pins {
+ pins = "gpio68";
+ function = "mdc";
+ drive-strength = <8>;
+ bias-pull-up;
+ };
+
+ mdio-pins {
+ pins = "gpio69";
+ function = "mdio";
+ drive-strength = <8>;
+ bias-pull-up;
+ };
+ };
+};
+
+&blsp1_uart5 {
+ status = "okay";
+};
+
+&prng {
+ status = "okay";
+};
+
+&cryptobam {
+ status = "okay";
+};
+
+&crypto {
+ status = "okay";
+};
+
+&qpic_bam {
+ status = "okay";
+};
+
+&blsp1_i2c2 {
+ status = "okay";
+
+ led-controller at 62 {
+ compatible = "nxp,pca9633";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <0x62>;
+ nxp,hw-blink;
+
+ led_system_red: led at 0 {
+ reg = <0>;
+ color = <LED_COLOR_ID_RED>;
+ function = LED_FUNCTION_STATUS;
+ };
+
+ led_system_green: led at 1 {
+ reg = <1>;
+ color = <LED_COLOR_ID_GREEN>;
+ function = LED_FUNCTION_STATUS;
+ };
+
+ led_system_blue: led at 2 {
+ reg = <2>;
+ color = <LED_COLOR_ID_BLUE>;
+ function = LED_FUNCTION_STATUS;
+ };
+ };
+};
+
+&mdio {
+ status = "okay";
+
+ pinctrl-0 = <&mdio_pins>;
+ pinctrl-names = "default";
+ reset-gpios = <&tlmm 37 GPIO_ACTIVE_LOW>;
+
+ ethernet-phy-package at 0 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "qcom,qca8075-package";
+ reg = <0>;
+
+ qca8075_1: ethernet-phy at 1 {
+ compatible = "ethernet-phy-ieee802.3-c22";
+ reg = <1>;
+ };
+
+ qca8075_2: ethernet-phy at 2 {
+ compatible = "ethernet-phy-ieee802.3-c22";
+ reg = <2>;
+ };
+
+ qca8075_3: ethernet-phy at 3 {
+ compatible = "ethernet-phy-ieee802.3-c22";
+ reg = <3>;
+ };
+
+ qca8075_4: ethernet-phy at 4 {
+ compatible = "ethernet-phy-ieee802.3-c22";
+ reg = <4>;
+ };
+ };
+};
+
+&switch {
+ status = "okay";
+
+ switch_lan_bmp = <(ESS_PORT3 | ESS_PORT4 | ESS_PORT5)>; /* lan port bitmap */
+ switch_wan_bmp = <ESS_PORT2>; /* wan port bitmap */
+ switch_mac_mode = <MAC_MODE_PSGMII>; /* mac mode for uniphy instance0*/
+
+ qcom,port_phyinfo {
+ port at 2 {
+ port_id = <2>;
+ phy_address = <1>;
+ };
+
+ port at 3 {
+ port_id = <3>;
+ phy_address = <2>;
+ };
+
+ port at 4 {
+ port_id = <4>;
+ phy_address = <3>;
+ };
+
+ port at 5 {
+ port_id = <5>;
+ phy_address = <4>;
+ };
+ };
+};
+
+&edma {
+ status = "okay";
+};
+
+&ssphy_0 {
+ status = "okay";
+};
+
+&qusb_phy_0 {
+ status = "okay";
+};
+
+&usb_0 {
+ status = "okay";
+};
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