[openwrt/openwrt] generic: 5.15: move MIPS cpuinfo patch from pending to backport
LEDE Commits
lede-commits at lists.infradead.org
Mon Oct 24 16:04:30 PDT 2022
ansuel pushed a commit to openwrt/openwrt.git, branch master:
https://git.openwrt.org/b1826346890fae87a2ed2f6242c5f074f3736c0a
commit b1826346890fae87a2ed2f6242c5f074f3736c0a
Author: Christian Marangi <ansuelsmth at gmail.com>
AuthorDate: Fri Oct 21 22:14:22 2022 +0200
generic: 5.15: move MIPS cpuinfo patch from pending to backport
Move MIPS cpuinfo patch from pending to backport as it got merged
upstream.
Signed-off-by: Christian Marangi <ansuelsmth at gmail.com>
---
...MIPS-kernel-proc-add-CPU-option-reporting.patch | 162 +++++++++++++++++++++
...ing-smp_processor_id-in-preemptible-in-sh.patch | 62 ++++++++
...-Add-CPU-option-reporting-to-proc-cpuinfo.patch | 136 -----------------
3 files changed, 224 insertions(+), 136 deletions(-)
diff --git a/target/linux/generic/backport-5.15/330-v5.16-01-MIPS-kernel-proc-add-CPU-option-reporting.patch b/target/linux/generic/backport-5.15/330-v5.16-01-MIPS-kernel-proc-add-CPU-option-reporting.patch
new file mode 100644
index 0000000000..c66a3f11b4
--- /dev/null
+++ b/target/linux/generic/backport-5.15/330-v5.16-01-MIPS-kernel-proc-add-CPU-option-reporting.patch
@@ -0,0 +1,162 @@
+From 626bfa03729959ea9917181fb3d8ffaa1594d02a Mon Sep 17 00:00:00 2001
+From: Hauke Mehrtens <hauke at hauke-m.de>
+Date: Wed, 13 Oct 2021 22:40:18 -0700
+Subject: [PATCH 1/1] MIPS: kernel: proc: add CPU option reporting
+
+Many MIPS CPUs have optional CPU features which are not activated for
+all CPU cores. Print the CPU options, which are implemented in the core,
+in /proc/cpuinfo. This makes it possible to see which features are
+supported and which are not supported. This should cover all standard
+MIPS extensions. Before, it only printed information about the main MIPS
+ASEs.
+
+Signed-off-by: Hauke Mehrtens <hauke at hauke-m.de>
+
+Changes from original patch[0]:
+- Remove cpu_has_6k_cache and cpu_has_8k_cache due to commit 6ce91ba8589a
+ ("MIPS: Remove cpu_has_6k_cache and cpu_has_8k_cache in cpu_cache_init()")
+- Add new options: mac2008_only, ftlbparex, gsexcex, mmid, mm_sysad,
+ mm_full
+- Use seq_puts instead of seq_printf as suggested by checkpatch
+- Minor commit message reword
+
+[0]: https://lore.kernel.org/linux-mips/20181223225224.23042-1-hauke@hauke-m.de/
+
+Signed-off-by: Ilya Lipnitskiy <ilya.lipnitskiy at gmail.com>
+Acked-by: Hauke Mehrtens <hauke at hauke-m.de>
+Signed-off-by: Thomas Bogendoerfer <tsbogend at alpha.franken.de>
+---
+ arch/mips/kernel/proc.c | 122 ++++++++++++++++++++++++++++++++++++++++
+ 1 file changed, 122 insertions(+)
+
+--- a/arch/mips/kernel/proc.c
++++ b/arch/mips/kernel/proc.c
+@@ -138,6 +138,128 @@ static int show_cpuinfo(struct seq_file
+ seq_printf(m, "micromips kernel\t: %s\n",
+ (read_c0_config3() & MIPS_CONF3_ISA_OE) ? "yes" : "no");
+ }
++
++ seq_puts(m, "Options implemented\t:");
++ if (cpu_has_tlb)
++ seq_puts(m, " tlb");
++ if (cpu_has_ftlb)
++ seq_puts(m, " ftlb");
++ if (cpu_has_tlbinv)
++ seq_puts(m, " tlbinv");
++ if (cpu_has_segments)
++ seq_puts(m, " segments");
++ if (cpu_has_rixiex)
++ seq_puts(m, " rixiex");
++ if (cpu_has_ldpte)
++ seq_puts(m, " ldpte");
++ if (cpu_has_maar)
++ seq_puts(m, " maar");
++ if (cpu_has_rw_llb)
++ seq_puts(m, " rw_llb");
++ if (cpu_has_4kex)
++ seq_puts(m, " 4kex");
++ if (cpu_has_3k_cache)
++ seq_puts(m, " 3k_cache");
++ if (cpu_has_4k_cache)
++ seq_puts(m, " 4k_cache");
++ if (cpu_has_tx39_cache)
++ seq_puts(m, " tx39_cache");
++ if (cpu_has_octeon_cache)
++ seq_puts(m, " octeon_cache");
++ if (cpu_has_fpu)
++ seq_puts(m, " fpu");
++ if (cpu_has_32fpr)
++ seq_puts(m, " 32fpr");
++ if (cpu_has_cache_cdex_p)
++ seq_puts(m, " cache_cdex_p");
++ if (cpu_has_cache_cdex_s)
++ seq_puts(m, " cache_cdex_s");
++ if (cpu_has_prefetch)
++ seq_puts(m, " prefetch");
++ if (cpu_has_mcheck)
++ seq_puts(m, " mcheck");
++ if (cpu_has_ejtag)
++ seq_puts(m, " ejtag");
++ if (cpu_has_llsc)
++ seq_puts(m, " llsc");
++ if (cpu_has_guestctl0ext)
++ seq_puts(m, " guestctl0ext");
++ if (cpu_has_guestctl1)
++ seq_puts(m, " guestctl1");
++ if (cpu_has_guestctl2)
++ seq_puts(m, " guestctl2");
++ if (cpu_has_guestid)
++ seq_puts(m, " guestid");
++ if (cpu_has_drg)
++ seq_puts(m, " drg");
++ if (cpu_has_rixi)
++ seq_puts(m, " rixi");
++ if (cpu_has_lpa)
++ seq_puts(m, " lpa");
++ if (cpu_has_mvh)
++ seq_puts(m, " mvh");
++ if (cpu_has_vtag_icache)
++ seq_puts(m, " vtag_icache");
++ if (cpu_has_dc_aliases)
++ seq_puts(m, " dc_aliases");
++ if (cpu_has_ic_fills_f_dc)
++ seq_puts(m, " ic_fills_f_dc");
++ if (cpu_has_pindexed_dcache)
++ seq_puts(m, " pindexed_dcache");
++ if (cpu_has_userlocal)
++ seq_puts(m, " userlocal");
++ if (cpu_has_nofpuex)
++ seq_puts(m, " nofpuex");
++ if (cpu_has_vint)
++ seq_puts(m, " vint");
++ if (cpu_has_veic)
++ seq_puts(m, " veic");
++ if (cpu_has_inclusive_pcaches)
++ seq_puts(m, " inclusive_pcaches");
++ if (cpu_has_perf_cntr_intr_bit)
++ seq_puts(m, " perf_cntr_intr_bit");
++ if (cpu_has_ufr)
++ seq_puts(m, " ufr");
++ if (cpu_has_fre)
++ seq_puts(m, " fre");
++ if (cpu_has_cdmm)
++ seq_puts(m, " cdmm");
++ if (cpu_has_small_pages)
++ seq_puts(m, " small_pages");
++ if (cpu_has_nan_legacy)
++ seq_puts(m, " nan_legacy");
++ if (cpu_has_nan_2008)
++ seq_puts(m, " nan_2008");
++ if (cpu_has_ebase_wg)
++ seq_puts(m, " ebase_wg");
++ if (cpu_has_badinstr)
++ seq_puts(m, " badinstr");
++ if (cpu_has_badinstrp)
++ seq_puts(m, " badinstrp");
++ if (cpu_has_contextconfig)
++ seq_puts(m, " contextconfig");
++ if (cpu_has_perf)
++ seq_puts(m, " perf");
++ if (cpu_has_mac2008_only)
++ seq_puts(m, " mac2008_only");
++ if (cpu_has_ftlbparex)
++ seq_puts(m, " ftlbparex");
++ if (cpu_has_gsexcex)
++ seq_puts(m, " gsexcex");
++ if (cpu_has_shared_ftlb_ram)
++ seq_puts(m, " shared_ftlb_ram");
++ if (cpu_has_shared_ftlb_entries)
++ seq_puts(m, " shared_ftlb_entries");
++ if (cpu_has_mipsmt_pertccounters)
++ seq_puts(m, " mipsmt_pertccounters");
++ if (cpu_has_mmid)
++ seq_puts(m, " mmid");
++ if (cpu_has_mm_sysad)
++ seq_puts(m, " mm_sysad");
++ if (cpu_has_mm_full)
++ seq_puts(m, " mm_full");
++ seq_puts(m, "\n");
++
+ seq_printf(m, "shadow register sets\t: %d\n",
+ cpu_data[n].srsets);
+ seq_printf(m, "kscratch registers\t: %d\n",
diff --git a/target/linux/generic/backport-5.15/330-v5.16-02-MIPS-Fix-using-smp_processor_id-in-preemptible-in-sh.patch b/target/linux/generic/backport-5.15/330-v5.16-02-MIPS-Fix-using-smp_processor_id-in-preemptible-in-sh.patch
new file mode 100644
index 0000000000..6caf7d06d4
--- /dev/null
+++ b/target/linux/generic/backport-5.15/330-v5.16-02-MIPS-Fix-using-smp_processor_id-in-preemptible-in-sh.patch
@@ -0,0 +1,62 @@
+From 1cab5bd69eb1f995ced2d7576cb15f8a8941fd85 Mon Sep 17 00:00:00 2001
+From: Tiezhu Yang <yangtiezhu at loongson.cn>
+Date: Thu, 25 Nov 2021 19:39:32 +0800
+Subject: [PATCH 1/1] MIPS: Fix using smp_processor_id() in preemptible in
+ show_cpuinfo()
+
+There exists the following issue under DEBUG_PREEMPT:
+
+ BUG: using smp_processor_id() in preemptible [00000000] code: systemd/1
+ caller is show_cpuinfo+0x460/0xea0
+ ...
+ Call Trace:
+ [<ffffffff8020f0dc>] show_stack+0x94/0x128
+ [<ffffffff80e6cab4>] dump_stack_lvl+0x94/0xd8
+ [<ffffffff80e74c5c>] check_preemption_disabled+0x104/0x110
+ [<ffffffff802209c8>] show_cpuinfo+0x460/0xea0
+ [<ffffffff80539d54>] seq_read_iter+0xfc/0x4f8
+ [<ffffffff804fcc10>] new_sync_read+0x110/0x1b8
+ [<ffffffff804ff57c>] vfs_read+0x1b4/0x1d0
+ [<ffffffff804ffb18>] ksys_read+0xd0/0x110
+ [<ffffffff8021c090>] syscall_common+0x34/0x58
+
+We can see the following call trace:
+ show_cpuinfo()
+ cpu_has_fpu
+ current_cpu_data
+ smp_processor_id()
+
+ $ addr2line -f -e vmlinux 0xffffffff802209c8
+ show_cpuinfo
+ arch/mips/kernel/proc.c:188
+
+ $ head -188 arch/mips/kernel/proc.c | tail -1
+ if (cpu_has_fpu)
+
+ arch/mips/include/asm/cpu-features.h
+ # define cpu_has_fpu (current_cpu_data.options & MIPS_CPU_FPU)
+
+ arch/mips/include/asm/cpu-info.h
+ #define current_cpu_data cpu_data[smp_processor_id()]
+
+Based on the above analysis, fix the issue by using raw_cpu_has_fpu
+which calls raw_smp_processor_id() in show_cpuinfo().
+
+Fixes: 626bfa037299 ("MIPS: kernel: proc: add CPU option reporting")
+Signed-off-by: Tiezhu Yang <yangtiezhu at loongson.cn>
+Signed-off-by: Thomas Bogendoerfer <tsbogend at alpha.franken.de>
+---
+ arch/mips/kernel/proc.c | 2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+--- a/arch/mips/kernel/proc.c
++++ b/arch/mips/kernel/proc.c
+@@ -166,7 +166,7 @@ static int show_cpuinfo(struct seq_file
+ seq_puts(m, " tx39_cache");
+ if (cpu_has_octeon_cache)
+ seq_puts(m, " octeon_cache");
+- if (cpu_has_fpu)
++ if (raw_cpu_has_fpu)
+ seq_puts(m, " fpu");
+ if (cpu_has_32fpr)
+ seq_puts(m, " 32fpr");
diff --git a/target/linux/generic/pending-5.15/309-MIPS-Add-CPU-option-reporting-to-proc-cpuinfo.patch b/target/linux/generic/pending-5.15/309-MIPS-Add-CPU-option-reporting-to-proc-cpuinfo.patch
deleted file mode 100644
index 318c0b1b25..0000000000
--- a/target/linux/generic/pending-5.15/309-MIPS-Add-CPU-option-reporting-to-proc-cpuinfo.patch
+++ /dev/null
@@ -1,136 +0,0 @@
-From 87ec87c2ad615c1a177cd08ef5fa29fc739f6e50 Mon Sep 17 00:00:00 2001
-From: Hauke Mehrtens <hauke at hauke-m.de>
-Date: Sun, 23 Dec 2018 18:06:53 +0100
-Subject: [PATCH] MIPS: Add CPU option reporting to /proc/cpuinfo
-
-Many MIPS CPUs have optional CPU features which are not activates for
-all CPU cores. Print the CPU options which are implemented in the core
-in /proc/cpuinfo. This makes it possible to see what features are
-supported and which are not supported. This should cover all standard
-MIPS extensions, before it only printed information about the main MIPS
-ASEs.
-
-Signed-off-by: Hauke Mehrtens <hauke at hauke-m.de>
----
- arch/mips/kernel/proc.c | 116 ++++++++++++++++++++++++++++++++++++++++
- 1 file changed, 116 insertions(+)
-
---- a/arch/mips/kernel/proc.c
-+++ b/arch/mips/kernel/proc.c
-@@ -138,6 +138,116 @@ static int show_cpuinfo(struct seq_file
- seq_printf(m, "micromips kernel\t: %s\n",
- (read_c0_config3() & MIPS_CONF3_ISA_OE) ? "yes" : "no");
- }
-+
-+ seq_printf(m, "Options implemented\t:");
-+ if (cpu_has_tlb)
-+ seq_printf(m, "%s", " tlb");
-+ if (cpu_has_ftlb)
-+ seq_printf(m, "%s", " ftlb");
-+ if (cpu_has_tlbinv)
-+ seq_printf(m, "%s", " tlbinv");
-+ if (cpu_has_segments)
-+ seq_printf(m, "%s", " segments");
-+ if (cpu_has_rixiex)
-+ seq_printf(m, "%s", " rixiex");
-+ if (cpu_has_ldpte)
-+ seq_printf(m, "%s", " ldpte");
-+ if (cpu_has_maar)
-+ seq_printf(m, "%s", " maar");
-+ if (cpu_has_rw_llb)
-+ seq_printf(m, "%s", " rw_llb");
-+ if (cpu_has_4kex)
-+ seq_printf(m, "%s", " 4kex");
-+ if (cpu_has_3k_cache)
-+ seq_printf(m, "%s", " 3k_cache");
-+ if (cpu_has_4k_cache)
-+ seq_printf(m, "%s", " 4k_cache");
-+ if (cpu_has_tx39_cache)
-+ seq_printf(m, "%s", " tx39_cache");
-+ if (cpu_has_octeon_cache)
-+ seq_printf(m, "%s", " octeon_cache");
-+ if (cpu_has_fpu)
-+ seq_printf(m, "%s", " fpu");
-+ if (cpu_has_32fpr)
-+ seq_printf(m, "%s", " 32fpr");
-+ if (cpu_has_cache_cdex_p)
-+ seq_printf(m, "%s", " cache_cdex_p");
-+ if (cpu_has_cache_cdex_s)
-+ seq_printf(m, "%s", " cache_cdex_s");
-+ if (cpu_has_prefetch)
-+ seq_printf(m, "%s", " prefetch");
-+ if (cpu_has_mcheck)
-+ seq_printf(m, "%s", " mcheck");
-+ if (cpu_has_ejtag)
-+ seq_printf(m, "%s", " ejtag");
-+ if (cpu_has_llsc)
-+ seq_printf(m, "%s", " llsc");
-+ if (cpu_has_guestctl0ext)
-+ seq_printf(m, "%s", " guestctl0ext");
-+ if (cpu_has_guestctl1)
-+ seq_printf(m, "%s", " guestctl1");
-+ if (cpu_has_guestctl2)
-+ seq_printf(m, "%s", " guestctl2");
-+ if (cpu_has_guestid)
-+ seq_printf(m, "%s", " guestid");
-+ if (cpu_has_drg)
-+ seq_printf(m, "%s", " drg");
-+ if (cpu_has_rixi)
-+ seq_printf(m, "%s", " rixi");
-+ if (cpu_has_lpa)
-+ seq_printf(m, "%s", " lpa");
-+ if (cpu_has_mvh)
-+ seq_printf(m, "%s", " mvh");
-+ if (cpu_has_vtag_icache)
-+ seq_printf(m, "%s", " vtag_icache");
-+ if (cpu_has_dc_aliases)
-+ seq_printf(m, "%s", " dc_aliases");
-+ if (cpu_has_ic_fills_f_dc)
-+ seq_printf(m, "%s", " ic_fills_f_dc");
-+ if (cpu_has_pindexed_dcache)
-+ seq_printf(m, "%s", " pindexed_dcache");
-+ if (cpu_has_userlocal)
-+ seq_printf(m, "%s", " userlocal");
-+ if (cpu_has_nofpuex)
-+ seq_printf(m, "%s", " nofpuex");
-+ if (cpu_has_vint)
-+ seq_printf(m, "%s", " vint");
-+ if (cpu_has_veic)
-+ seq_printf(m, "%s", " veic");
-+ if (cpu_has_inclusive_pcaches)
-+ seq_printf(m, "%s", " inclusive_pcaches");
-+ if (cpu_has_perf_cntr_intr_bit)
-+ seq_printf(m, "%s", " perf_cntr_intr_bit");
-+ if (cpu_has_ufr)
-+ seq_printf(m, "%s", " ufr");
-+ if (cpu_has_fre)
-+ seq_printf(m, "%s", " fre");
-+ if (cpu_has_cdmm)
-+ seq_printf(m, "%s", " cdmm");
-+ if (cpu_has_small_pages)
-+ seq_printf(m, "%s", " small_pages");
-+ if (cpu_has_nan_legacy)
-+ seq_printf(m, "%s", " nan_legacy");
-+ if (cpu_has_nan_2008)
-+ seq_printf(m, "%s", " nan_2008");
-+ if (cpu_has_ebase_wg)
-+ seq_printf(m, "%s", " ebase_wg");
-+ if (cpu_has_badinstr)
-+ seq_printf(m, "%s", " badinstr");
-+ if (cpu_has_badinstrp)
-+ seq_printf(m, "%s", " badinstrp");
-+ if (cpu_has_contextconfig)
-+ seq_printf(m, "%s", " contextconfig");
-+ if (cpu_has_perf)
-+ seq_printf(m, "%s", " perf");
-+ if (cpu_has_shared_ftlb_ram)
-+ seq_printf(m, "%s", " shared_ftlb_ram");
-+ if (cpu_has_shared_ftlb_entries)
-+ seq_printf(m, "%s", " shared_ftlb_entries");
-+ if (cpu_has_mipsmt_pertccounters)
-+ seq_printf(m, "%s", " mipsmt_pertccounters");
-+ seq_printf(m, "\n");
-+
- seq_printf(m, "shadow register sets\t: %d\n",
- cpu_data[n].srsets);
- seq_printf(m, "kscratch registers\t: %d\n",
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