[source] mediatek: fix support for gmac1 using external PHY
LEDE Commits
lede-commits at lists.infradead.org
Mon Apr 24 03:18:15 PDT 2017
blogic pushed a commit to source.git, branch master:
https://git.lede-project.org/f3bae0fa4b2e2e3eea64102eb40cd0dffb59f9d3
commit f3bae0fa4b2e2e3eea64102eb40cd0dffb59f9d3
Author: John Crispin <john at phrozen.org>
AuthorDate: Fri Apr 21 09:40:01 2017 +0200
mediatek: fix support for gmac1 using external PHY
Signed-off-by: John Crispin <john at phrozen.org>
---
target/linux/mediatek/config-4.9 | 1 +
.../files/arch/arm/boot/dts/mt7623-NAND.dts | 27 +++++++++-
.../files/arch/arm/boot/dts/mt7623-eMMC.dts | 59 ++++++++++++++++++++++
target/linux/mediatek/patches-4.9/0095-ephy.patch | 30 +++++++++++
4 files changed, 115 insertions(+), 2 deletions(-)
diff --git a/target/linux/mediatek/config-4.9 b/target/linux/mediatek/config-4.9
index 1d77275..88332e4 100644
--- a/target/linux/mediatek/config-4.9
+++ b/target/linux/mediatek/config-4.9
@@ -218,6 +218,7 @@ CONFIG_I2C=y
CONFIG_I2C_BOARDINFO=y
CONFIG_I2C_CHARDEV=y
CONFIG_I2C_MT65XX=y
+CONFIG_ICPLUS_PHY=y
CONFIG_IIO=y
# CONFIG_IIO_BUFFER is not set
# CONFIG_IIO_TRIGGER is not set
diff --git a/target/linux/mediatek/files/arch/arm/boot/dts/mt7623-NAND.dts b/target/linux/mediatek/files/arch/arm/boot/dts/mt7623-NAND.dts
index d90e0fb..072ebe7 100644
--- a/target/linux/mediatek/files/arch/arm/boot/dts/mt7623-NAND.dts
+++ b/target/linux/mediatek/files/arch/arm/boot/dts/mt7623-NAND.dts
@@ -454,6 +454,14 @@
&gmac1 {
mac-address = [00 11 22 33 44 56];
status = "okay";
+
+ phy-mode = "trgmii";
+
+ fixed-link {
+ speed = <1000>;
+ full-duplex;
+ pause;
+ };
};
&gmac2 {
@@ -490,29 +498,45 @@
port at 0 {
reg = <0>;
label = "lan0";
+ cpu = <&cpu_port0>;
};
port at 1 {
reg = <1>;
label = "lan1";
+ cpu = <&cpu_port0>;
};
port at 2 {
reg = <2>;
label = "lan2";
+ cpu = <&cpu_port0>;
};
port at 3 {
reg = <3>;
label = "lan3";
+ cpu = <&cpu_port0>;
};
port at 4 {
reg = <4>;
label = "wan";
+ cpu = <&cpu_port1>;
};
- port at 6 {
+ cpu_port1: port at 5 {
+ reg = <5>;
+ label = "cpu";
+ ethernet = <&gmac2>;
+ phy-mode = "trgmii";
+ fixed-link {
+ speed = <1000>;
+ full-duplex;
+ };
+ };
+
+ cpu_port0: port at 6 {
reg = <6>;
label = "cpu";
ethernet = <&gmac1>;
@@ -526,7 +550,6 @@
};
};
-
&pwm {
pinctrl-names = "default";
pinctrl-0 = <&pwm_pins>;
diff --git a/target/linux/mediatek/files/arch/arm/boot/dts/mt7623-eMMC.dts b/target/linux/mediatek/files/arch/arm/boot/dts/mt7623-eMMC.dts
index 86c4dd5..36b0065 100644
--- a/target/linux/mediatek/files/arch/arm/boot/dts/mt7623-eMMC.dts
+++ b/target/linux/mediatek/files/arch/arm/boot/dts/mt7623-eMMC.dts
@@ -474,6 +474,65 @@
&gmac2 {
mac-address = [00 11 22 33 44 55];
status = "okay";
+
+ phy-handle = <&phy5>;
+};
+
+&mdio0 {
+ switch at 0 {
+ compatible = "mediatek,mt7530";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <0>;
+
+ pinctrl-names = "default";
+ pinctrl-0 = <ð_default>;
+
+ core-supply = <&mt6323_vpa_reg>;
+ io-supply = <&mt6323_vemc3v3_reg>;
+ reset-gpios = <&pio 33 0>;
+
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <0>;
+ port at 0 {
+ reg = <0>;
+ label = "lan0";
+ };
+
+ port at 1 {
+ reg = <1>;
+ label = "lan1";
+ };
+
+ port at 2 {
+ reg = <2>;
+ label = "lan2";
+ };
+
+ port at 3 {
+ reg = <3>;
+ label = "lan3";
+ };
+
+ port at 6 {
+ reg = <6>;
+ label = "cpu";
+ ethernet = <&gmac1>;
+ phy-mode = "trgmii";
+ fixed-link {
+ speed = <1000>;
+ full-duplex;
+ };
+ };
+ };
+ };
+
+ phy5: ethernet-phy at 5 {
+ reg = <5>;
+ phy-mode = "rgmii-rxid";
+ };
};
&pwm {
diff --git a/target/linux/mediatek/patches-4.9/0095-ephy.patch b/target/linux/mediatek/patches-4.9/0095-ephy.patch
new file mode 100644
index 0000000..52d8299
--- /dev/null
+++ b/target/linux/mediatek/patches-4.9/0095-ephy.patch
@@ -0,0 +1,30 @@
+Index: linux-4.9.20/drivers/net/dsa/mt7530.c
+===================================================================
+--- linux-4.9.20.orig/drivers/net/dsa/mt7530.c
++++ linux-4.9.20/drivers/net/dsa/mt7530.c
+@@ -629,6 +629,11 @@ mt7530_setup(struct dsa_switch *ds)
+ val = mt7530_read(priv, MT7530_MHWTRAP);
+ val &= ~MHWTRAP_P6_DIS & ~MHWTRAP_PHY_ACCESS;
+ val |= MHWTRAP_MANUAL;
++ if (!dsa_is_cpu_port(ds, 5)) {
++ val |= MHWTRAP_P5_DIS;
++ val |= MHWTRAP_P5_MAC_SEL;
++ val |= MHWTRAP_P5_RGMII_MODE;
++ }
+ mt7530_write(priv, MT7530_MHWTRAP, val);
+
+ /* Enable and reset MIB counters */
+Index: linux-4.9.20/drivers/net/ethernet/mediatek/mtk_eth_soc.c
+===================================================================
+--- linux-4.9.20.orig/drivers/net/ethernet/mediatek/mtk_eth_soc.c
++++ linux-4.9.20/drivers/net/ethernet/mediatek/mtk_eth_soc.c
+@@ -221,6 +221,9 @@ static void mtk_phy_link_adjust(struct n
+ netif_carrier_on(dev);
+ else
+ netif_carrier_off(dev);
++
++ if (!of_phy_is_fixed_link(mac->of_node))
++ phy_print_status(dev->phydev);
+ }
+
+ static int mtk_phy_connect_node(struct mtk_eth *eth, struct mtk_mac *mac,
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