[PATCH 2/8] ppc64: Use kernel terminology for each level in 4-level page table

[Hari Bathini]

For 4-level page table, we are referring to level3 as PGD instead of
PUD, which is not inline with how kernel refers to it.  This patch
corrects it by referring to level4 as PGD and level3 as PUD.

Signed-off-by: Hari Bathini <hbathini at linux.vnet.ibm.com>
---
 arch/ppc64.c   |   34 +++++++++++++++++-----------------
 makedumpfile.h |    6 +++---
 2 files changed, 20 insertions(+), 20 deletions(-)

diff --git a/arch/ppc64.c b/arch/ppc64.c
index 2cc3906..d1d000f 100644
--- a/arch/ppc64.c
+++ b/arch/ppc64.c
@@ -231,10 +231,10 @@ ppc64_vmemmap_to_phys(unsigned long vaddr)
 static unsigned long long
 ppc64_vtop_level4(unsigned long vaddr)
 {
-	ulong *level4, *level4_dir;
-	ulong *page_dir, *page_middle;
-	ulong *page_table;
-	unsigned long long level4_pte, pgd_pte;
+	ulong *level4;
+	ulong *pgdir, *page_upper;
+	ulong *page_middle, *page_table;
+	unsigned long long pgd_pte, pud_pte;
 	unsigned long long pmd_pte, pte;
 	unsigned long long paddr = NOT_PADDR;
 
@@ -251,34 +251,34 @@ ppc64_vtop_level4(unsigned long vaddr)
 	}
 
 	level4 = (ulong *)info->kernel_pgd;
-	level4_dir = (ulong *)((ulong *)level4 + L4_OFFSET(vaddr));
+	pgdir = (ulong *)((ulong *)level4 + PGD_OFFSET_L4(vaddr));
 	if (!readmem(VADDR, PAGEBASE(level4), info->page_buf, PAGESIZE())) {
-		ERRMSG("Can't read level4 page: 0x%llx\n", PAGEBASE(level4));
+		ERRMSG("Can't read PGD page: 0x%llx\n", PAGEBASE(level4));
 		return NOT_PADDR;
 	}
-	level4_pte = ULONG((info->page_buf + PAGEOFFSET(level4_dir)));
-	if (!level4_pte)
+	pgd_pte = ULONG((info->page_buf + PAGEOFFSET(pgdir)));
+	if (!pgd_pte)
 		return NOT_PADDR;
 
 	/*
 	 * Sometimes we don't have level3 pagetable entries
 	 */
 	if (info->l3_index_size != 0) {
-		page_dir = (ulong *)((ulong *)level4_pte + PGD_OFFSET_L4(vaddr));
-		if (!readmem(VADDR, PAGEBASE(level4_pte), info->page_buf, PAGESIZE())) {
-			ERRMSG("Can't read PGD page: 0x%llx\n", PAGEBASE(level4_pte));
+		page_upper = (ulong *)((ulong *)pgd_pte + PUD_OFFSET_L4(vaddr));
+		if (!readmem(VADDR, PAGEBASE(pgd_pte), info->page_buf, PAGESIZE())) {
+			ERRMSG("Can't read PUD page: 0x%llx\n", PAGEBASE(pgd_pte));
 			return NOT_PADDR;
 		}
-		pgd_pte = ULONG((info->page_buf + PAGEOFFSET(page_dir)));
-		if (!pgd_pte)
+		pud_pte = ULONG((info->page_buf + PAGEOFFSET(page_upper)));
+		if (!pud_pte)
 			return NOT_PADDR;
 	} else {
-		pgd_pte = level4_pte;
+		pud_pte = pgd_pte;
 	}
 
-	page_middle = (ulong *)((ulong *)pgd_pte + PMD_OFFSET_L4(vaddr));
-	if (!readmem(VADDR, PAGEBASE(pgd_pte), info->page_buf, PAGESIZE())) {
-		ERRMSG("Can't read PMD page: 0x%llx\n", PAGEBASE(pgd_pte));
+	page_middle = (ulong *)((ulong *)pud_pte + PMD_OFFSET_L4(vaddr));
+	if (!readmem(VADDR, PAGEBASE(pud_pte), info->page_buf, PAGESIZE())) {
+		ERRMSG("Can't read PMD page: 0x%llx\n", PAGEBASE(pud_pte));
 		return NOT_PADDR;
 	}
 	pmd_pte = ULONG((info->page_buf + PAGEOFFSET(page_middle)));
diff --git a/makedumpfile.h b/makedumpfile.h
index 46c940c..c154abd 100644
--- a/makedumpfile.h
+++ b/makedumpfile.h
@@ -666,11 +666,11 @@ int get_va_bits_arm64(void);
 #define PTE_SHIFT_L4_64K_V2  30
 #define PMD_MASKED_BITS_64K  0x1ff
 
-#define L4_MASK		\
+#define PGD_MASK_L4		\
 	(info->kernel_version >= KERNEL_VERSION(3, 10, 0) ? (info->ptrs_per_pgd - 1) : 0x1ff)
-#define L4_OFFSET(vaddr)	((vaddr >> (info->l4_shift)) & L4_MASK)
+#define PGD_OFFSET_L4(vaddr)	((vaddr >> (info->l4_shift)) & PGD_MASK_L4)
 
-#define PGD_OFFSET_L4(vaddr)	\
+#define PUD_OFFSET_L4(vaddr)	\
 	((vaddr >> (info->l3_shift)) & (info->ptrs_per_l3 - 1))
 
 #define PMD_OFFSET_L4(vaddr)	\