Sensitivity setting problem

Denis Vlasenko vda
Tue Jun 24 02:06:33 PDT 2003


On 24 June 2003 09:31, Denis Vlasenko wrote:
> On 24 June 2003 04:55, Jouni Malinen wrote:
> > On Tue, Jun 24, 2003 at 12:04:21AM +0300, insecure wrote:
> > 
> > > I tried iwconfig wlan0 sens 1,2,3 but to no avail.
> > > I presume that foreign signal exceeds threshold at any of these
> > > settings.
> > > 
> > > I've read the code and it seems hostap does not accept any other
> > > sens values.
> > 
> > Current version is mapping sensitivity configuration into Prism2
> > cnfSystemScale with those three options. However, this does not really
> > control what you would like to set with sensitivity threshold. Some of
> > the BBP control registers might be more helpful, but I have not
> > experimented with that kind of configuration.
> 
> I'd be glad to experiment with. I still fail to find Intersil
> docs on prism, anybody feel free to mail me any and all non-NDA
> pdfs you have, because today I am limited to guessing off the
> hostap source.

fn8019.pdf:
 
"PRISM 2.5 Wireless LAN Integrated Medium Access Controller 
with Baseband Processor" 
 
Clear Channel Assessment (CCA) and 
Energy Detect (ED) Description 

	lots of stuff ahead...

The Clear Channel Assessment (CCA) circuit implements the 
carrier sense portion of a Carrier Sense Multiple Access 
(CSMA) networking scheme. The Clear Channel Assessment 
(CCA) monitors the environment to determine when it is clear 
to transmit. The CCA circuit in the ISL3873B can be 
programmed to be a function of RSSI (energy detected on the 
channel), CS1, SQ1, or various combinations. The CCA is 
used by the Media Access Controller (MAC) in the ISL3873B. 
The MAC decides on transmission based on traffic to send 
and the CCA indication. The CCA indication can be ignored, 
allowing transmissions independent of any channel 
conditions. The CCA in combination with the visibility of the 
various internal parameters (i.e., Energy detection 
measurement results), can assist the MAC in executing 
algorithms that can adapt to the environment. These 
algorithms can increase network throughput by minimizing 
collisions and reducing transmissions liable to errors. 
 
There are three measures that can be used in the CCA 
assessment. The Receive Signal Strength Indication (RSSI) 
which indicates the energy at the antenna, CS1 and carrier 
sense (SQ1). CS1 becomes active anytime the AGC portion 
of the circuit becomes unlocked, which is likely at the onset of 
a signal that is strong enough to support 11Mbps, but may not 
occur with the onset of a signal that is only strong enough to 
support 1 or 2MBps. CS1 stays active until the AGC locks and 
a SQ1 assessment is done, if SQ1 is false, then CS1 is 
cleared, which deasserts CCA. If SQ1 is true, then tracking is 
begun, and CCA continues to show the channel busy. CS1 
may occur at any time during acquisition as the AGC state 
machine runs asynchronously with respect to slot times. 
SQ1 becomes active only when a spread signal with the 
proper PN code has been detected, and the peak correlation 
amplitude to sidelobe ratio exceeds a set threshold, so it 
may not be adequate in itself. 
A SQ1 evaluation occurs whenever the AGC has remained 
locked for the entire data ingest period. When this happens, 
SQ1 is updated between 8 and 9us into the 10us dwell. If 
CS1 is not active, two consecutive SQ1?s are required to 
advance the part to tracking. 
The state of CCA is not guaranteed from the time RX_PE 
goes high until the first CCA assessment is made. At the end 
of a packet, after RXPE has been deasserted, the state of 
CCA is also not guaranteed. 
The Receive Signal Strength Indication (RSSI) measurement is 
derived from the state of the AGC circuit. ED is the comparison 
result of RSSI against a threshold. The threshold may be set to 
an absolute power value, or it may be set to be N dB above the 
measured noise floor. See CR 35. The ISL3873B measures 
and stores the RSSI level when it detects no presence of BPSK 
or QPSK signals. The average value of a 256 value buffer is 
taken to be the noise floor. Thus, the value of the noise floor will 
adapt to the environment. A separate noise floor value is 
maintained for each antenna. An initial value of the noise floor 
is established within 50s of the chip being active and is refined 
as time goes on. Deasserting RX_PE does not corrupt the 
learned values. If the absolute power metric is chosen, this 
threshold is normally set to between -70 and -80dBm. 
If desired, ED may be used in the acquisition process as well 
as CCA. ED may be used to mask (squelch) weak signals 
and prevent radio reception of signals too weak to support 
the high data rates, signals from adjacent cells, networks, or 
buildings. See CR 47 (bit 6). 
 
	i like this! ;) 
 
The Configuration registers effecting the CCA algorithm 
operation are summarized below (more programming details 
on these registers can be found under the Control Registers 
section of this document). 
The CCA output from pin 60 of the device can be defined as 
active high or active low through CR 1 (bit 2). 
CR9(6:5) allows CCA to be programmed to be a function of ED 
only, the logical operation of (CS1 OR SQ1), the logical function 
of (ED AND (CS1 OR SQ1)), or (ED OR (CS1 OR SQ1)). 
CR9(7) lets the user select from sampled CCA mode, which 
means CCA will not glitch, is updated once per symbol and is 
valid for reading at 15.8s or 18.7s. In non-sampled mode, 
CCA may change at any time, potentially several times per slot, 
as ED and CS1 operate asynchronously to slot times. 
In a typical system CCA will be monitored to determine when 
the channel is clear. Once the channel is detected busy, 
CCA should be checked periodically to determine if the 
channel becomes clear. Once MD_RDY goes active, CCA 
should be ignored for the remainder of the message. Failure 
to monitor CCA until MD_RDY goes active (or use of a time-out 
circuit) could result in a stalled system as it is possible for 
the channel to be busy and then become clear without an 
MD_RDY occurring. 
 
	ok, here are the registers: 
 
CONFIGURATION REGISTER 1 ADDRESS (02h) R/W I/O POLARITY 
This register is used to define the phase of clocks and other interface signals. 00h is normal setting. 
Bit 2 This control bit selects the active level of the Clear Channel Assessment (CCA) output pin. 
Logic 1 = CCA Active 1. 
Logic 0 = CCA Active 0. 
	seems like we won't need to touch this 
 
CONFIGURATION REGISTER 9 ADDRESS (12h) R/W TX CONFIGURE 
Bit 7 CCA sample mode time. 
0 = 18.7us. 
1 = 15.8us. 
Bits 6:5 CCA mode. 
00 - CCA is based only on ED. 
01 - CCA is based on (CS1 OR SQ1). 
10 - CCA is based on (ED AND (CS1 OR SQ1)). 
11 - CCA is based on (ED OR (CS1 OR SQ1)). 
	well... thats whole lot of options ;) 
 
CONFIGURATION REGISTER ADDRESS 35 (46h) R/W ED THRESHOLD 
Bit 7 Energy Detect Threshold control. 
0 = threshold is relative to noise floor. 
1 = threshold is absolute. 
Bits 6:0 ED Threshold. Range 0 - 127dBm. RSSI > threshold triggers ED. 
	This is exactly what I need! Wow. 
 
CONFIGURATION REGISTER ADDRESS 47 (5Eh) R/W ACQUISITION THRESHOLDS 
Bit 7 Disable False alarm Rate Processing. 
0 = Enable, SQ1 #1 threshold is adjusted in real time by FAR logic. 
1 = Disable, SQ1 #1 threshold is set to value of CR 47 (5:0). 
Bit 6 ED and SQ1 control for acquisition. 
0 = SQ1. 
1 = ED and SQ1. 
Bits 5:0 SQ1 threshold #1, range 0 to 7.875. (000.00 - 111.111). 
Used for initial detect and initial setting for FAR. 
	Dunno. Maybe leave alone for now. 
 
Well. There's lots of options, but as a first simple 
approximation we can map 
	iwconfig wlan# sens N (N=0..127) 
to CR35.6:0 bits 
and make CR9.6:5 settable by prism private ioctls 
At least I'd like to be able to set 'em to 00 or 10, 
so that any signal below ED is dismissed. 
-- 
vda




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