[PATCH] arm: socfpga: agilex5: define QSPI flash registers

[Sascha Hauer]

On Mon, 28 Sep 2026 14:56:13 +0200, Michael Tretter wrote:
> After requesting direct QSPI flash access from the SDM firmware, barebox
> gains memory mapped access to the QSPI flash controller.
> 
> Add the registers to the SoCfpga memory map to be able to use names
> instead of registers when initializing the driver.
> 
> 
> [...]

Applied, thanks!

[1/1] arm: socfpga: agilex5: define QSPI flash registers
      https://git.pengutronix.de/cgit/barebox/commit/?id=85af7d074a5a (link may not be stable)

Best regards,
-- 
Sascha Hauer <s.hauer at pengutronix.de>