[PATCH 00/11] arm: socfpga: agilex5: add xload support for bl33 to FSBL
Sascha Hauer
s.hauer at pengutronix.de
Mon Oct 19 05:43:53 PDT 2026
On Wed, 07 Oct 2026 12:55:45 +0200, Michael Tretter wrote:
> The image of the first stage boot loader on the Agilex 5 is limited to
> approximately 256k. The SRAM is actually 512k, but there is some handoff
> data at the send of the SRAM, which must not be overridden. There are
> some size checks, but due to compression of the FSBL image, it's the
> possible image size cannot be determined reliably.
>
> The barebox PBL and a full featured barebox proper are easily larger
> than the allowed size. Compression of the piggy data may even be counter
> productive, since the entire FSBL image is compressed again when
> creating the boot image.
>
> [...]
Applied, thanks!
[01/11] mtd: spi-nor: drop requirement for device field
https://git.pengutronix.de/cgit/barebox/commit/?id=a2bc4d81a1d3 (link may not be stable)
[02/11] mtd: spi-nor: enable module in PBL
https://git.pengutronix.de/cgit/barebox/commit/?id=778f9acdcc74 (link may not be stable)
[03/11] mtd: spi-nor: cadence: extract common part for use in PBL
https://git.pengutronix.de/cgit/barebox/commit/?id=d9184efbfc83 (link may not be stable)
[04/11] mtd: spi-nor: cadence: add a PBL driver
https://git.pengutronix.de/cgit/barebox/commit/?id=41363fd77534 (link may not be stable)
[05/11] arm: socfpga: agilex5: add bl33 xload support
https://git.pengutronix.de/cgit/barebox/commit/?id=eff2acaf2fb6 (link may not be stable)
[06/11] arm: socfpga: agilex5: separate load and start of bl33
https://git.pengutronix.de/cgit/barebox/commit/?id=f0de955e1047 (link may not be stable)
[07/11] arm: socfpga: agilex5: enable xload for bl33
https://git.pengutronix.de/cgit/barebox/commit/?id=6a3484db1463 (link may not be stable)
[08/11] arm: socfpga: agilex5: initialize QSPI flash in PBL
https://git.pengutronix.de/cgit/barebox/commit/?id=0c4c1cdf2fc4 (link may not be stable)
[09/11] arm: socfpga: agilex5: add agilex5_barebox_entry_xload
https://git.pengutronix.de/cgit/barebox/commit/?id=14810aeb4c90 (link may not be stable)
[10/11] arm: socfpga: axe5-eagle: move lowlevel init to separate function
https://git.pengutronix.de/cgit/barebox/commit/?id=92133cb0c3d5 (link may not be stable)
[11/11] arm: socfpga: axe5-eagle: build FSBL without piggy data
https://git.pengutronix.de/cgit/barebox/commit/?id=2b358eb23e26 (link may not be stable)
Best regards,
--
Sascha Hauer <s.hauer at pengutronix.de>
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