[PATCH] ARM: dts: imx6: phycore: Fix pin settings for ADIN1300 PHY

[Florijan Plohl]

From: Stefan Riedmueller <s.riedmueller at phytec.de>

Change drive strength:
 - TXC 		57 Ohm
 - TD0-3	76 Ohm
 - TX_CTL	76 Ohm

Remove pull ups from following pins so the won't interfere with strap
pin latching of the PHY:
 - ENET_TX_CLK
 - RXC
 - RD0-3
 - RX_CTL

Signed-off-by: Stefan Riedmueller <s.riedmueller at phytec.de>
Signed-off-by: Florijan Plohl <florijan.plohl at norik.com>
---
 arch/arm/dts/imx6qdl-phytec-phycore-som.dtsi | 24 ++++++++++++++++++++
 1 file changed, 24 insertions(+)

diff --git a/arch/arm/dts/imx6qdl-phytec-phycore-som.dtsi b/arch/arm/dts/imx6qdl-phytec-phycore-som.dtsi
index 60f7e2c14b..7199c416c8 100644
--- a/arch/arm/dts/imx6qdl-phytec-phycore-som.dtsi
+++ b/arch/arm/dts/imx6qdl-phytec-phycore-som.dtsi
@@ -79,6 +79,30 @@ pmic at 58 {
 	};
 };
 
+&iomuxc {
+	pinctrl_enet: enetgrp {
+		fsl,pins = <
+			MX6QDL_PAD_ENET_MDIO__ENET_MDIO		0x1b0b0
+			MX6QDL_PAD_ENET_MDC__ENET_MDC		0x1b0b0
+			MX6QDL_PAD_RGMII_TXC__RGMII_TXC		0x1b020
+			MX6QDL_PAD_RGMII_TD0__RGMII_TD0		0x1b018
+			MX6QDL_PAD_RGMII_TD1__RGMII_TD1		0x1b018
+			MX6QDL_PAD_RGMII_TD2__RGMII_TD2		0x1b018
+			MX6QDL_PAD_RGMII_TD3__RGMII_TD3		0x1b018
+			MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL	0x1b018
+			MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK	0x180b0
+			MX6QDL_PAD_RGMII_RXC__RGMII_RXC		0x180b0
+			MX6QDL_PAD_RGMII_RD0__RGMII_RD0		0x180b0
+			MX6QDL_PAD_RGMII_RD1__RGMII_RD1		0x180b0
+			MX6QDL_PAD_RGMII_RD2__RGMII_RD2		0x180b0
+			MX6QDL_PAD_RGMII_RD3__RGMII_RD3		0x180b0
+			MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL	0x180b0
+			MX6QDL_PAD_ENET_TX_EN__ENET_TX_EN	0x1b0b0
+			MX6QDL_PAD_SD2_DAT1__GPIO1_IO14		0x1b0b0
+		>;
+	};
+};
+
 &m25p80 {
 	status = "disabled";
 
-- 
2.43.0