[PATCH 07/10] mci: sdhci: rockchip: set TX-path source-select bit in DWCMSHC_EMMC_DLL_TXCLK

[Ahmad Fatoum]

On 5/11/26 2:08 PM, Sascha Hauer wrote:
> Linux's sdhci-of-dwcmshc has, since rk3588 support was added in 2022,
> unconditionally OR'd DLL_RXCLK_NO_INVERTER << DWCMSHC_EMMC_DLL_RXCLK_SRCSEL
> (bit 29) into the DWCMSHC_EMMC_DLL_TXCLK write that follows DLL lock
> in the high-speed path. Despite its name, position 29 in this
> register controls a TX-path source-select; the constant just happens
> to share the SRCSEL shift with the RX path register.
> 
> Barebox was never writing this bit. The omission was harmless on
> controllers where the RX path's matching write (a few lines earlier
> in this function) already sets the same bit position 29 - because on
> those parts both clock paths end up with a working source-select.
> The bit is needed for the TX path to have a working source-select in
> its own right, however; the next commit's revision split, which
> correctly stops setting the RX-path bit on rk3588 silicon, would
> otherwise leave the TX path with no source-select at all and break
> eMMC writes.
> 
> Match Linux's behaviour: set the bit unconditionally in the TXCLK
> write.
> 
> Assisted-by: Claude Opus 4.7 <noreply at anthropic.com>
> Signed-off-by: Sascha Hauer <s.hauer at pengutronix.de>

Acked-by: Ahmad Fatoum <a.fatoum at pengutronix.de>

> ---
>  drivers/mci/rockchip-dwcmshc-sdhci.c | 1 +
>  1 file changed, 1 insertion(+)
> 
> diff --git a/drivers/mci/rockchip-dwcmshc-sdhci.c b/drivers/mci/rockchip-dwcmshc-sdhci.c
> index 23c887e906..fa2d9964a5 100644
> --- a/drivers/mci/rockchip-dwcmshc-sdhci.c
> +++ b/drivers/mci/rockchip-dwcmshc-sdhci.c
> @@ -212,6 +212,7 @@ static void rk_sdhci_set_clock(struct rk_sdhci_host *host, unsigned int clock)
>  
>  	extra = DWCMSHC_EMMC_DLL_DLYENA |
>  		DLL_TXCLK_TAPNUM_FROM_SW |
> +		DLL_RXCLK_NO_INVERTER << DWCMSHC_EMMC_DLL_RXCLK_SRCSEL |
>  		txclk_tapnum;
>  	sdhci_write32(&host->sdhci, DWCMSHC_EMMC_DLL_TXCLK, extra);
>  
> 

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