[PATCH v2 08/10] arm: socfgpa: iossm: extract initialization of one interface

Sascha Hauer s.hauer at pengutronix.de
Wed Apr 15 03:31:00 PDT 2026


On Wed, Apr 15, 2026 at 10:29:57AM +0200, Michael Tretter wrote:
> Hi Sascha,
> 
> On Wed, 15 Apr 2026 08:12:35 +0200, Sascha Hauer wrote:
> > This patch causes imtermediate compile breakage.
> > 
> > On Thu, Apr 09, 2026 at 03:52:48PM +0200, Michael Tretter wrote:
> > > +	pr_debug("%s: Start memory initialization BIST on full memory address",
> > > +		 __func__);
> > > +	mem_exp = 0x40;
> > > +
> > > +	ret = io96b_mb_req(io96b_csr_addr,
> > > +			   mb_ctrl->ip_type[interface],
> > > +			   mb_ctrl->ip_instance_id[interface],
> > > +			   CMD_TRIG_CONTROLLER_OP, BIST_MEM_INIT_START,
> > > +			   FIELD_PREP(GENMASK(5, 0), mem_exp),
> > 
> > 0x40 doesn't fit into GENMASK(5, 0).
> > 
> > This is detected here because 0x40 is a constant. In a following patch
> > you add some equations to mem_exp, so it's no longer constant for the
> > compiler and it compiles fine. Nevertheless the 0x40 is still present
> > with this series applied and either that or the mask seem wrong. Can
> > you have a look?
> 
> The mask for mem_exp is correct. The 0x40 case for initializing the full
> memory should explicitly set bit 6 in the parameter instead of being a
> special value of mem_exp.

Does this bit 6 have a name?

> 
> Should I send a patch on top of the series or send a v3 with a fix for
> the patch that causes the intermediate compile breakage?

A patch on top of this series is enough. I'll integrate it into this
series then.

Sascha

-- 
Pengutronix e.K.                           |                             |
Steuerwalder Str. 21                       | http://www.pengutronix.de/  |
31137 Hildesheim, Germany                  | Phone: +49-5121-206917-0    |
Amtsgericht Hildesheim, HRA 2686           | Fax:   +49-5121-206917-5555 |



More information about the barebox mailing list