[PATCH 1/2] usb: dwc2: core: add no-csftrst-wait DT property

[Ahmad Fatoum]

Hello Anis,

On 3/31/26 5:17 AM, chalianis1 at gmail.com wrote:
> From: Chali Anis <chalianis1 at gmail.com>
> 
> Some platforms (e.g. RPi4/bcm2711) do not deassert GRSTCTL_CSFTRST within
> the expected window but continue to operate correctly, causing probe to
> fail with ETIMEDOUT.
> 
> Per the datasheet, GRSTCTL_CSFTRST is self-clearing but requires at least
> 3 PHY clocks after reset before any PHY domain access. Add a 1us delay to
> satisfy this requirement.
> 
> Additionally introduce the 'no-csftrst-wait' devicetree property to skip
> polling for the bit to clear on platforms where the reset completes but the
> status bit is unreliable.

I still wonder why there are no workarounds for this particular issue in
Linux or U-Boot. We seem to do something different when we run into this
reliably, but others don't?

I originally thought, it may be related to the version of the IP,
because both Linux and U-Boot have special handling for >= 4.20, but I
checked on my Rpi4 and DWC2 has v2.80 there (Synopsis ID 4f54280a)

> -	ret = dwc2_wait_bit_clear(dwc2, GRSTCTL, GRSTCTL_CSFTRST, 10000);
> -	if (ret) {
> -		dwc2_warn(dwc2, "%s: Timeout! Waiting for Core Soft Reset\n",
> +	/* Wait for at least 3 PHY Clocks */
> +	udelay(1);
> +
> +	if (!of_property_read_bool(np, "no-csftrst-wait")) {

barebox-specific Device Tree properties should be documented in
Documentation/devicetree/bindings/.

Alternatively, you can check of_machine_is_compatible("brcm,bcm2711")

Cheers,
Ahmad

> +		ret = dwc2_wait_bit_clear(dwc2, GRSTCTL, GRSTCTL_CSFTRST, 10000);
> +		if (ret) {
> +			dwc2_warn(dwc2, "%s: Timeout! Waiting for Core Soft Reset\n",
>  				__func__);
> -		return ret;
> +			return ret;
> +		}
>  	}
>  
>  	if (wait_for_host_mode)
> 
> 

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