[PATCH master] video: IPUv3-LDB: fix LVDS serial clock configuration

Ahmad Fatoum a.fatoum at pengutronix.de
Wed May 7 00:25:44 PDT 2025


Hello Sascha,

On 5/6/25 09:51, Sascha Hauer wrote:
> On Sun, Apr 27, 2025 at 03:44:53PM +0200, Ahmad Fatoum wrote:

>> @@ -189,10 +200,10 @@ static int imx6q_ldb_prepare(struct imx_ldb_channel *imx_ldb_ch, int di,
>>  		pixclk *= 2;

This multiplication by 2 is only done for the single channel mode.

>>  
>>  	if (dual) {
>> -		imx6q_set_clock(ldb, ipuno, dino, 0, pixclk);
>> -		imx6q_set_clock(ldb, ipuno, dino, 1, pixclk);
>> +		imx6q_set_clock(ldb, ipuno, dino, 0, pixclk * 7, pixclk);
>> +		imx6q_set_clock(ldb, ipuno, dino, 1, pixclk * 7, pixclk);
> 
> I think in dual channel mode we have to maintain a 1:3.5 setting instead
> of 1:7.

That means pixclk for dual channel mode here is already half the value
it would be for single channel, i,e. 1:3.5.

Thanks,
Ahmad

> 
> Sascha
> 
> 

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