[PATCH 3/6] ARM: Rockchip: fix clang warning about passing 32-bit register operand

Ahmad Fatoum a.fatoum at pengutronix.de
Wed Nov 6 10:57:21 PST 2024


clangd warns that "Value size does not match register size specified by
the constraint and modifier".

Promote the subtraction result to unsigned long to fix this.

The 16 is likely unnecessary, but I am hesitant to remove it without testing.

Signed-off-by: Ahmad Fatoum <a.fatoum at pengutronix.de>
---
 arch/arm/mach-rockchip/atf.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/arm/mach-rockchip/atf.c b/arch/arm/mach-rockchip/atf.c
index 1e1861191c99..4c16ec3bc66a 100644
--- a/arch/arm/mach-rockchip/atf.c
+++ b/arch/arm/mach-rockchip/atf.c
@@ -59,7 +59,7 @@ static unsigned long load_elf64_image_phdr(const void *elf)
 										\
 	/* Setup an initial stack for EL2 */                                    \
 	asm volatile("msr sp_el2, %0" : :                                       \
-			"r" (SOC##_BAREBOX_LOAD_ADDRESS - 16) :                 \
+			"r" ((ulong)SOC##_BAREBOX_LOAD_ADDRESS - 16) :		\
 			"cc");                                                  \
 										\
 	bl31_entry(bl31, optee_load_address,                                    \
-- 
2.39.5




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