[PATCH v2] ARM64: reloc: fix relocation error for big fat bareboxes

Ahmad Fatoum a.fatoum at pengutronix.de
Wed May 15 06:05:33 PDT 2024


Hi,

On 15.05.24 07:55, Sascha Hauer wrote:
> 
> On Mon, 13 May 2024 16:01:21 +0200, Ahmad Fatoum wrote:
>> A multi_v8 barebox with KASAN enabled is 2051804 bytes even after
>> compression and this breaks linking for me:
>>
>>   arch/arm/cpu/common.o: in function `global_variable_offset':
>>   arch/arm/include/asm/reloc.h:20:(.text.relocate_to_current_adr+0x1c):
>>     relocation truncated to fit: R_AARCH64_ADR_PREL_LO21 against symbol
>>     `_text' defined in .text section in .tmp_barebox1
>>   arch/arm/include/asm/reloc.h:20:(.text.relocate_to_current_adr+0x40):
>>     relocation truncated to fit: R_AARCH64_ADR_PREL_LO21 against symbol
>>     `_text' defined in .text section in .tmp_barebox1
>>
>> [...]
> 
> Applied, thanks!

Thanks for applying. I thought some more about whether we should instead
have:

#ifdef __PBL__
        "adr    %0, _text\n"
#else
        /* (Decompressed) barebox proper should always be 4K aligned
         * so adrp here should be fine. PBL may also have adrp
         * references
         */
        "adrp   %0, _text\n"
        "add    %0, %0, :lo12:_text\n"
#endif

Otherwise, we require PBL to be placed 4K-aligned. Looking at GCC 13.2.1
output for an i.MX8M board, there are quite a lot of adrp references already,
so I think this shouldn't break anything that's not broken already anyway.

Just writing my thoughts for future reference.

Cheers,
Ahmad

> 
> [1/1] ARM64: reloc: fix relocation error for big fat bareboxes
>       https://git.pengutronix.de/cgit/barebox/commit/?id=9246c916a25a (link may not be stable)
> 
> Best regards,

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