[PATCH 09/14] ARM: arria10: mark image in OCRAM as valid

[Steffen Trumtrar]

The bootrom checks on warm reset if there is already a valid image in
ocram and boots it. Otherwise the next boot slot is loaded.

When barebox gets to this stage, mark it as successfully loaded to ocram.

Signed-off-by: Steffen Trumtrar <s.trumtrar at pengutronix.de>
---
 arch/arm/mach-socfpga/arria10-generic.c       | 4 ++++
 include/mach/socfpga/arria10-system-manager.h | 5 +++--
 2 files changed, 7 insertions(+), 2 deletions(-)

diff --git a/arch/arm/mach-socfpga/arria10-generic.c b/arch/arm/mach-socfpga/arria10-generic.c
index fc2ef3e292..d7ce6d84ab 100644
--- a/arch/arm/mach-socfpga/arria10-generic.c
+++ b/arch/arm/mach-socfpga/arria10-generic.c
@@ -74,6 +74,10 @@ static int arria10_generic_init(void)
 	pr_debug("Register restart handler\n");
 	restart_handler_register_fn("soc", arria10_restart_soc);
 
+	/* mark image in OCRAM as valid and finally disable the l4wd0 */
+	writel(ARRIA10_SYSMGR_ROM_INITSWSTATE_VALID, ARRIA10_SYSMGR_ROM_INITSWSTATE);
+	arria10_watchdog_disable();
+
 	return 0;
 }
 postcore_initcall(arria10_generic_init);
diff --git a/include/mach/socfpga/arria10-system-manager.h b/include/mach/socfpga/arria10-system-manager.h
index 536baf6bc3..b0654408a5 100644
--- a/include/mach/socfpga/arria10-system-manager.h
+++ b/include/mach/socfpga/arria10-system-manager.h
@@ -52,7 +52,8 @@
 #define ARRIA10_SYSMGR_NOC_IDLESTATUS		(ARRIA10_SYSMGR_ADDR + 0xd4)
 #define ARRIA10_SYSMGR_FPGA2SOC_CTRL		(ARRIA10_SYSMGR_ADDR + 0xd8)
 
-#define ARRIA10_SYSMGR_ROM_INITSWLASTLD		(ARRIA10_SYSMGR_ADDR + 0x10)
+#define ARRIA10_SYSMGR_ROM_INITSWSTATE		(ARRIA10_SYSMGR_ADDR + 0x20c)
+#define ARRIA10_SYSMGR_ROM_INITSWLASTLD		(ARRIA10_SYSMGR_ADDR + 0x210)
 #define ARRIA10_SYSMGR_ROM_ISW0			(ARRIA10_SYSMGR_ADDR + 0x230)
 #define ARRIA10_SYSMGR_ROM_ISW1			(ARRIA10_SYSMGR_ADDR + 0x234)
 #define ARRIA10_SYSMGR_ROM_ISW2			(ARRIA10_SYSMGR_ADDR + 0x238)
@@ -62,7 +63,7 @@
 #define ARRIA10_SYSMGR_ROM_ISW6			(ARRIA10_SYSMGR_ADDR + 0x248)
 #define ARRIA10_SYSMGR_ROM_ISW7			(ARRIA10_SYSMGR_ADDR + 0x24c)
 
-
+#define ARRIA10_SYSMGR_ROM_INITSWSTATE_VALID	0x49535756
 
 #define ARRIA10_SYSMGR_BOOTINFO_BSEL_MASK	0x00007000
 #define ARRIA10_SYSMGR_BOOTINFO_BSEL_SHIFT	12

-- 
2.43.2