[PATCH v2 1/3] kvx: add qemu dts
Yann Sionneau
ysionneau at kalrayinc.com
Tue Aug 13 05:44:06 PDT 2024
Add qemu dts that will mostly be used to run test in CI.
Signed-off-by: Yann Sionneau <ysionneau at kalrayinc.com>
---
v1 -> v2:
- Rewrite '/' node compatible to be more readable: split into 2 strings instead of using \0 in the middle.
- use phandle for stdout-path
- always compile qemu.dtb, remove option in Kconfig
- add 'scall-poweroff' node in qemu.dts to make poweroff work in qemu
arch/kvx/configs/generic_defconfig | 1 +
arch/kvx/dts/Makefile | 1 +
arch/kvx/dts/qemu.dts | 273 +++++++++++++++++++++++++++++
3 files changed, 275 insertions(+)
create mode 100644 arch/kvx/dts/qemu.dts
diff --git a/arch/kvx/configs/generic_defconfig b/arch/kvx/configs/generic_defconfig
index 0d971ff3d5..7f1235b6d2 100644
--- a/arch/kvx/configs/generic_defconfig
+++ b/arch/kvx/configs/generic_defconfig
@@ -11,3 +11,4 @@ CONFIG_CLOCKSOURCE_KVX=y
CONFIG_WATCHDOG=y
CONFIG_WATCHDOG_KVX=y
CONFIG_PINCTRL_SINGLE=y
+CONFIG_BOARD_QEMU=y
diff --git a/arch/kvx/dts/Makefile b/arch/kvx/dts/Makefile
index 41613033ce..43fc2aacd3 100644
--- a/arch/kvx/dts/Makefile
+++ b/arch/kvx/dts/Makefile
@@ -10,5 +10,6 @@ obj-$(CONFIG_BUILTIN_DTB) += $(BUILTIN_DTB).dtb.o
endif
obj-$(CONFIG_BOARD_K200) += k200.dtb.o
+extra-y += qemu.dtb.o
clean-files := *.dtb *.dtb.S .*.dtc .*.pre .*.dts *.dtb.z
diff --git a/arch/kvx/dts/qemu.dts b/arch/kvx/dts/qemu.dts
new file mode 100644
index 0000000000..f1ec8370c5
--- /dev/null
+++ b/arch/kvx/dts/qemu.dts
@@ -0,0 +1,273 @@
+/dts-v1/;
+
+/ {
+ model = "Kalray Coolidge processor (QEMU)";
+ #address-cells = <0x02>;
+ #size-cells = <0x02>;
+ compatible = "kalray,coolidge","kalray,iss";
+
+ chosen {
+ stdout-path = &uart0;
+ };
+
+ memory at 0 {
+ reg = <0x00 0x00 0x00 0x400000>;
+ device_type = "memory";
+ };
+
+ apic_mailbox: apic-mailbox at a00000 {
+ msi-controller;
+ interrupts = <0x00 0x01 0x02 0x03 0x04 0x05 0x06 0x07 0x08 0x09 0x0a 0x0b 0x0c 0x0d 0x0e 0x0f 0x10 0x11 0x12 0x13 0x14 0x15 0x16 0x17 0x18 0x19 0x1a 0x1b 0x1c 0x1d 0x1e 0x1f 0x20 0x21 0x22 0x23 0x24 0x25 0x26 0x27 0x28 0x29 0x2a 0x2b 0x2c 0x2d 0x2e 0x2f 0x30 0x31 0x32 0x33 0x34 0x35 0x36 0x37 0x38 0x39 0x3a 0x3b 0x3c 0x3d 0x3e 0x3f 0x40 0x41 0x42 0x43 0x44 0x45 0x46 0x47 0x48 0x49 0x4a 0x4b 0x4c 0x4d 0x4e 0x4f 0x50 0x51 0x52 0x53 0x54 0x55 0x56 0x57 0x58 0x59 0x5a 0x5b 0x5c 0x5d 0x5e 0x5f 0x60 0x61 0x62 0x63 0x64 0x65 0x66 0x67 0x68 0x69 0x6a 0x6b 0x6c 0x6d 0x6e 0x6f 0x70 0x71 0x72 0x73 0x74 0x75 0x76 0x77 0x78>;
+ interrupt-parent = <&apic_gic>;
+ #interrupt-cells = <0x00>;
+ interrupt-controller;
+ reg = <0x00 0xa00000 0x00 0x10000>;
+ compatible = "kalray,kvx-apic-mailbox";
+ };
+
+ apic_gic: apic-gic at a20000 {
+ interrupts = <0x04 0x05 0x06 0x07>;
+ interrupt-parent = <&core_intc>;
+ #interrupt-cells = <0x01>;
+ interrupt-controller;
+ reg = <0x00 0xa20000 0x00 0x12000>;
+ compatible = "kalray,kvx-apic-gic";
+ };
+
+ pwr_ctrl: pwr-ctrl at a40000 {
+ reg = <0x00 0xa40000 0x00 0x4188>;
+ compatible = "kalray,kvx-pwr-ctrl";
+ };
+
+ dsu-clock at a44180 {
+ clocks = <&core_clk>;
+ reg = <0x00 0xa44180 0x00 0x08>;
+ compatible = "kalray,kvx-dsu-clock";
+ };
+
+ ipi-ctrl at ad0000 {
+ interrupts = <0x18>;
+ interrupt-parent = <&core_intc>;
+ reg = <0x00 0xad0000 0x00 0x1000>;
+ compatible = "kalray,kvx-ipi-ctrl";
+ };
+
+ scall-poweroff {
+ compatible = "kalray,kvx-scall-poweroff";
+ };
+
+ axi {
+ ranges;
+ #address-cells = <0x02>;
+ #size-cells = <0x02>;
+ compatible = "simple-bus";
+
+ uart0: uart0 at 20210000 {
+ reg-shift = <0x02>;
+ reg-io-width = <0x04>;
+ clocks = <&ref_clk>;
+ interrupts = <0x29 0x04>;
+ interrupt-parent = <&itgen_socp_0>;
+ reg = <0x00 0x20210000 0x00 0x100>;
+ compatible = "snps,dw-apb-uart";
+ };
+
+ uart1 at 20211000 {
+ reg-shift = <0x02>;
+ reg-io-width = <0x04>;
+ clocks = <&ref_clk>;
+ interrupts = <0x2a 0x04>;
+ interrupt-parent = <&itgen_socp_0>;
+ reg = <0x00 0x20211000 0x00 0x100>;
+ compatible = "snps,dw-apb-uart";
+ };
+
+ uart2 at 20212000 {
+ reg-shift = <0x02>;
+ reg-io-width = <0x04>;
+ clocks = <&ref_clk>;
+ interrupts = <0x2b 0x04>;
+ interrupt-parent = <&itgen_socp_0>;
+ reg = <0x00 0x20212000 0x00 0x100>;
+ compatible = "snps,dw-apb-uart";
+ };
+
+ uart3 at 20213000 {
+ reg-shift = <0x02>;
+ reg-io-width = <0x04>;
+ clocks = <&ref_clk>;
+ interrupts = <0x2c 0x04>;
+ interrupt-parent = <&itgen_socp_0>;
+ reg = <0x00 0x20213000 0x00 0x100>;
+ compatible = "snps,dw-apb-uart";
+ };
+
+ uart4 at 20214000 {
+ reg-shift = <0x02>;
+ reg-io-width = <0x04>;
+ clocks = <&ref_clk>;
+ interrupts = <0x2d 0x04>;
+ interrupt-parent = <&itgen_socp_0>;
+ reg = <0x00 0x20214000 0x00 0x100>;
+ compatible = "snps,dw-apb-uart";
+ };
+
+ uart5 at 20215000 {
+ reg-shift = <0x02>;
+ reg-io-width = <0x04>;
+ clocks = <&ref_clk>;
+ interrupts = <0x2e 0x04>;
+ interrupt-parent = <&itgen_socp_0>;
+ reg = <0x00 0x20215000 0x00 0x100>;
+ compatible = "snps,dw-apb-uart";
+ };
+
+ itgen_socp_0: itgen-soc-periph0 at 27000000 {
+ msi-parent = <&apic_mailbox>;
+ #interrupt-cells = <0x02>;
+ interrupt-controller;
+ reg = <0x00 0x27000000 0x00 0x1104>;
+ compatible = "kalray,kvx-itgen";
+ };
+
+ itgen_socp_1: itgen-soc-periph1 at 27010000 {
+ msi-parent = <&apic_mailbox>;
+ #interrupt-cells = <0x02>;
+ interrupt-controller;
+ reg = <0x00 0x27010000 0x00 0x1104>;
+ compatible = "kalray,kvx-itgen";
+ };
+ };
+
+ memory at 100000000 {
+ reg = <0x01 0x00 0x00 0x80000000>;
+ device_type = "memory";
+ };
+
+ ftu at 10181000 {
+ reg = <0x00 0x10181000 0x00 0x418>;
+ compatible = "kalray,kvx-syscon";
+ };
+
+ core_intc: core-intc {
+ #interrupt-cells = <0x01>;
+ interrupt-controller;
+ compatible = "kalray,kvx-core-intc";
+ };
+
+ core-timer {
+ clocks = <&core_clk>;
+ interrupts = <0x00>;
+ interrupt-parent = <&core_intc>;
+ compatible = "kalray,kvx-core-timer";
+ };
+
+ core-watchdog {
+ clocks = <&core_clk>;
+ interrupts = <0x02>;
+ interrupt-parent = <&core_intc>;
+ compatible = "kalray,kvx-core-watchdog";
+ };
+
+ clocks {
+
+ core_clk: core-clk {
+ clock-frequency = <1000000>;
+ #clock-cells = <0x00>;
+ compatible = "fixed-clock";
+ };
+
+ ref_clk: ref-clk {
+ clock-frequency = <0x5f5e100>;
+ #clock-cells = <0x00>;
+ compatible = "fixed-clock";
+ };
+ };
+
+ cpus {
+ #address-cells = <0x01>;
+ #size-cells = <0x00>;
+
+ cpu at 0 {
+ power-controller = <&pwr_ctrl>;
+ clocks = <&core_clk>;
+ reg = <0x00>;
+ compatible = "kalray,kvx-pe";
+ };
+
+ cpu at 1 {
+ reg = <0x01>;
+ compatible = "kalray,kvx-pe";
+ };
+
+ cpu at 2 {
+ reg = <0x02>;
+ compatible = "kalray,kvx-pe";
+ };
+
+ cpu at 3 {
+ reg = <0x03>;
+ compatible = "kalray,kvx-pe";
+ };
+
+ cpu at 4 {
+ reg = <0x04>;
+ compatible = "kalray,kvx-pe";
+ };
+
+ cpu at 5 {
+ reg = <0x05>;
+ compatible = "kalray,kvx-pe";
+ };
+
+ cpu at 6 {
+ reg = <0x06>;
+ compatible = "kalray,kvx-pe";
+ };
+
+ cpu at 7 {
+ reg = <0x07>;
+ compatible = "kalray,kvx-pe";
+ };
+
+ cpu at 8 {
+ reg = <0x08>;
+ compatible = "kalray,kvx-pe";
+ };
+
+ cpu at 9 {
+ reg = <0x09>;
+ compatible = "kalray,kvx-pe";
+ };
+
+ cpu at 10 {
+ reg = <0x0a>;
+ compatible = "kalray,kvx-pe";
+ };
+
+ cpu at 11 {
+ reg = <0x0b>;
+ compatible = "kalray,kvx-pe";
+ };
+
+ cpu at 12 {
+ reg = <0x0c>;
+ compatible = "kalray,kvx-pe";
+ };
+
+ cpu at 13 {
+ reg = <0x0d>;
+ compatible = "kalray,kvx-pe";
+ };
+
+ cpu at 14 {
+ reg = <0x0e>;
+ compatible = "kalray,kvx-pe";
+ };
+
+ cpu at 15 {
+ reg = <0x0f>;
+ compatible = "kalray,kvx-pe";
+ };
+ };
+};
--
2.34.1
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