[PATCH 2/2] mci: stm32_sdmmc2: enable eMMC 52MHz DDR mode

[Ahmad Fatoum]

Dual data rate can be enabled on STM32 SDMMC2 host by toggling a bit in
the CLKRC register and avoiding clock bypass. Let's do that for a nice
boost in throughput. Before:

  barebox at STM32MP157C-ED1:/ time cp /dev/mmc0.data /tmp
  time: 2684ms

After:

  barebox at STM32MP157C-ED1:/ time cp /dev/mmc1.data /tmp
  time: 1624ms

Signed-off-by: Ahmad Fatoum <a.fatoum at pengutronix.de>
---
 drivers/mci/stm32_sdmmc2.c | 14 ++++++++++++--
 1 file changed, 12 insertions(+), 2 deletions(-)

diff --git a/drivers/mci/stm32_sdmmc2.c b/drivers/mci/stm32_sdmmc2.c
index 90e969a867e6..1bfef1ccf0eb 100644
--- a/drivers/mci/stm32_sdmmc2.c
+++ b/drivers/mci/stm32_sdmmc2.c
@@ -538,11 +538,14 @@ static void stm32_sdmmc2_set_ios(struct mci_host *mci, struct mci_ios *ios)
 	struct stm32_sdmmc2_priv *priv = to_mci_host(mci);
 	u32 desired = mci->clock;
 	u32 sys_clock = clk_get_rate(priv->clk);
-	u32 clk = 0;
+	u32 clk = 0, ddr = 0;
 
 	dev_dbg(priv->dev, "%s: bus_width = %d, clock = %d\n", __func__,
 		mci->bus_width, mci->clock);
 
+	if (mci_timing_is_ddr(ios->timing))
+		ddr = SDMMC_CLKCR_DDR;
+
 	if (mci->clock)
 		stm32_sdmmc2_pwron(priv);
 	else
@@ -555,13 +558,15 @@ static void stm32_sdmmc2_set_ios(struct mci_host *mci, struct mci_ios *ios)
 	 * clk_div > 0 and NEGEDGE = 1 => command and data generated on
 	 * SDMMCCLK falling edge
 	 */
-	if (desired && (sys_clock > desired ||
+	if (desired && (sys_clock > desired || ddr ||
 			IS_RISING_EDGE(priv->clk_reg_msk))) {
 		clk = DIV_ROUND_UP(sys_clock, 2 * desired);
 		if (clk > SDMMC_CLKCR_CLKDIV_MAX)
 			clk = SDMMC_CLKCR_CLKDIV_MAX;
 	}
 
+	clk |= ddr;
+
 	if (mci->bus_width == MMC_BUS_WIDTH_4)
 		clk |= SDMMC_CLKCR_WIDBUS_4;
 	if (mci->bus_width == MMC_BUS_WIDTH_8)
@@ -624,6 +629,11 @@ static int stm32_sdmmc2_probe(struct amba_device *adev,
 	if (mci->f_max >= 52000000)
 		mci->host_caps |= MMC_CAP_MMC_HIGHSPEED_52MHZ;
 
+	if (of_property_read_bool(np, "mmc-ddr-3_3v"))
+		mci->host_caps |= MMC_CAP_MMC_3_3V_DDR;
+	if (of_property_read_bool(np, "mmc-ddr-1_8v"))
+		mci->host_caps |= MMC_CAP_MMC_1_8V_DDR;
+
 	return mci_register(&priv->mci);
 
 priv_free:
-- 
2.39.2