[PATCH] mci: imx-esdhc-pbl: fix image load in DDR mode

[Sascha Hauer]

On Wed, Jul 05, 2023 at 09:03:52PM +0200, Marco Felsch wrote:
> The __esdhc_send_cmd checks the sdhci.timing setting and configures it
> accordingly. If the BootROM configured the device to operare in DDR mode
> we need to honor that else the PBL can't load the binary correctly from
> the eMMC. Therefore readback the sdhci mixctrl setting and set the
> sdhci.timing to DDR52. At the moment DDR52 is the fastest/highest
> transferrate the BootROM supports, so we don't need to handle HS200/400
> yet.
> 
> Signed-off-by: Marco Felsch <m.felsch at pengutronix.de>
> ---
>  drivers/mci/imx-esdhc-pbl.c | 6 ++++++
>  1 file changed, 6 insertions(+)

Applied, thanks

Sascha

> 
> diff --git a/drivers/mci/imx-esdhc-pbl.c b/drivers/mci/imx-esdhc-pbl.c
> index 7c5febb7a8..f789f43b69 100644
> --- a/drivers/mci/imx-esdhc-pbl.c
> +++ b/drivers/mci/imx-esdhc-pbl.c
> @@ -120,6 +120,8 @@ esdhc_load_image(struct fsl_esdhc_host *host, ptrdiff_t address,
>  static void imx_esdhc_init(struct fsl_esdhc_host *host,
>  			   struct esdhc_soc_data *data)
>  {
> +	u32 mixctrl;
> +
>  	data->flags = ESDHC_FLAG_USDHC;
>  	host->socdata = data;
>  	esdhc_populate_sdhci(host);
> @@ -129,6 +131,10 @@ static void imx_esdhc_init(struct fsl_esdhc_host *host,
>  		      FIELD_PREP(WML_WR_WML_MASK, SECTOR_WML) |
>  		      FIELD_PREP(WML_RD_BRST_LEN, 16)         |
>  		      FIELD_PREP(WML_RD_WML_MASK, SECTOR_WML));
> +
> +	mixctrl = sdhci_read32(&host->sdhci, IMX_SDHCI_MIXCTRL);
> +	if (mixctrl & MIX_CTRL_DDREN)
> +		host->sdhci.timing = MMC_TIMING_MMC_DDR52;
>  }
>  
>  static int imx8m_esdhc_init(struct fsl_esdhc_host *host,
> -- 
> 2.39.2
> 
> 
> 

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