[PATCH 12/21] MIPS: pbl: make sure to disable interrupts/watchpoints on entry

[Denis Orlov]

The first thing that we should do on entry is to disable interrupts and
watchpoints, as who knows in what state we got there. The former was not
being done consistently on every board, while the latter was only being
done in the barebox proper for some reason. Add a macro that combines
both of those actions and ensure that it's used in every board's entry
code.

Signed-off-by: Denis Orlov <denorl2009 at gmail.com>
---
 arch/mips/boards/8devices-lima/lowlevel.S      |  2 ++
 arch/mips/boards/dlink-dir-320/lowlevel.S      |  2 +-
 arch/mips/boards/img-ci20/lowlevel.S           |  2 +-
 arch/mips/boards/loongson-ls1b/lowlevel.S      |  2 +-
 arch/mips/boards/netgear-wg102/lowlevel.S      |  2 +-
 arch/mips/boards/qemu-malta/lowlevel.S         |  2 +-
 arch/mips/boards/ritmix-rzx50/lowlevel.S       |  2 +-
 arch/mips/boards/tplink-wdr4300/lowlevel.S     |  2 ++
 arch/mips/include/asm/pbl_macros.h             | 16 ++++++++++++++++
 arch/mips/mach-ath79/include/mach/pbl_macros.h |  4 ++++
 10 files changed, 30 insertions(+), 6 deletions(-)

diff --git a/arch/mips/boards/8devices-lima/lowlevel.S b/arch/mips/boards/8devices-lima/lowlevel.S
index 8a4c77a44f..fad4d8b4af 100644
--- a/arch/mips/boards/8devices-lima/lowlevel.S
+++ b/arch/mips/boards/8devices-lima/lowlevel.S
@@ -15,6 +15,8 @@
 
 ENTRY_FUNCTION(BOARD_PBL_START)
 
+	mips_cpu_setup
+
 	debug_ll_ath79_init
 
 	hornet_mips24k_cp0_setup
diff --git a/arch/mips/boards/dlink-dir-320/lowlevel.S b/arch/mips/boards/dlink-dir-320/lowlevel.S
index 7e496b50d1..d0376c515c 100644
--- a/arch/mips/boards/dlink-dir-320/lowlevel.S
+++ b/arch/mips/boards/dlink-dir-320/lowlevel.S
@@ -13,7 +13,7 @@
 
 ENTRY_FUNCTION(BOARD_PBL_START)
 
-	mips_disable_interrupts
+	mips_cpu_setup
 
 	/* CPU/SoC specific setup ... */
 	/* ... absent */
diff --git a/arch/mips/boards/img-ci20/lowlevel.S b/arch/mips/boards/img-ci20/lowlevel.S
index 0295e44d1a..8ff9871c51 100644
--- a/arch/mips/boards/img-ci20/lowlevel.S
+++ b/arch/mips/boards/img-ci20/lowlevel.S
@@ -14,7 +14,7 @@
 
 ENTRY_FUNCTION(BOARD_PBL_START)
 
-	mips_disable_interrupts
+	mips_cpu_setup
 
 	/* CPU/SoC specific setup ... */
 	/* ... absent */
diff --git a/arch/mips/boards/loongson-ls1b/lowlevel.S b/arch/mips/boards/loongson-ls1b/lowlevel.S
index c3d46c773b..e823bb37dd 100644
--- a/arch/mips/boards/loongson-ls1b/lowlevel.S
+++ b/arch/mips/boards/loongson-ls1b/lowlevel.S
@@ -17,7 +17,7 @@
 
 ENTRY_FUNCTION(BOARD_PBL_START)
 
-	mips_disable_interrupts
+	mips_cpu_setup
 
 	pbl_blt 0xbf000000 skip_pll_ram_config t0
 
diff --git a/arch/mips/boards/netgear-wg102/lowlevel.S b/arch/mips/boards/netgear-wg102/lowlevel.S
index d57b62583d..6fdcfa3cca 100644
--- a/arch/mips/boards/netgear-wg102/lowlevel.S
+++ b/arch/mips/boards/netgear-wg102/lowlevel.S
@@ -14,7 +14,7 @@
 
 ENTRY_FUNCTION(BOARD_PBL_START)
 
-	mips_disable_interrupts
+	mips_cpu_setup
 
 	pbl_ar2312_pll
 
diff --git a/arch/mips/boards/qemu-malta/lowlevel.S b/arch/mips/boards/qemu-malta/lowlevel.S
index 8c2d82dab2..8ff7d93a74 100644
--- a/arch/mips/boards/qemu-malta/lowlevel.S
+++ b/arch/mips/boards/qemu-malta/lowlevel.S
@@ -32,7 +32,7 @@
 
 ENTRY_FUNCTION(BOARD_PBL_START)
 
-	mips_disable_interrupts
+	mips_cpu_setup
 
 	/* cpu specific setup ... */
 	/* ... absent */
diff --git a/arch/mips/boards/ritmix-rzx50/lowlevel.S b/arch/mips/boards/ritmix-rzx50/lowlevel.S
index 33810f67f5..4fccf0ddb9 100644
--- a/arch/mips/boards/ritmix-rzx50/lowlevel.S
+++ b/arch/mips/boards/ritmix-rzx50/lowlevel.S
@@ -14,7 +14,7 @@
 
 ENTRY_FUNCTION(BOARD_PBL_START)
 
-	mips_disable_interrupts
+	mips_cpu_setup
 
 	/* CPU/SoC specific setup ... */
 	/* ... absent */
diff --git a/arch/mips/boards/tplink-wdr4300/lowlevel.S b/arch/mips/boards/tplink-wdr4300/lowlevel.S
index 01cc9fc212..94ae707b0b 100644
--- a/arch/mips/boards/tplink-wdr4300/lowlevel.S
+++ b/arch/mips/boards/tplink-wdr4300/lowlevel.S
@@ -15,6 +15,8 @@
 
 ENTRY_FUNCTION(BOARD_PBL_START)
 
+	mips_cpu_setup
+
 	debug_ll_ath79_init
 
 	hornet_mips24k_cp0_setup
diff --git a/arch/mips/include/asm/pbl_macros.h b/arch/mips/include/asm/pbl_macros.h
index 6e177ff69a..cc81e06a64 100644
--- a/arch/mips/include/asm/pbl_macros.h
+++ b/arch/mips/include/asm/pbl_macros.h
@@ -151,6 +151,14 @@
 	.set	pop
 	.endm
 
+	.macro	mips_disable_watchpoints
+	.set	push
+	.set	noreorder
+	mtc0	zero, CP0_WATCHLO
+	mtc0	zero, CP0_WATCHHI
+	.set	pop
+	.endm
+
 	.macro	mips64_enable_64bit_addressing
 #ifdef CONFIG_64BIT
 	.set	push
@@ -162,6 +170,14 @@
 #endif
 	.endm
 
+	.macro	mips_cpu_setup
+	.set	push
+	.set	noreorder
+	mips_disable_interrupts
+	mips_disable_watchpoints
+	.set	pop
+	.endm
+
 	.macro	mips_barebox_10h
 	.set	push
 	.set	noreorder
diff --git a/arch/mips/mach-ath79/include/mach/pbl_macros.h b/arch/mips/mach-ath79/include/mach/pbl_macros.h
index 86d2cba392..4b7b48618b 100644
--- a/arch/mips/mach-ath79/include/mach/pbl_macros.h
+++ b/arch/mips/mach-ath79/include/mach/pbl_macros.h
@@ -374,6 +374,8 @@
 	.set	push
 	.set	noreorder
 
+	mips_cpu_setup
+
 	pbl_blt 0xbf000000 skip_pll_ram_config t8
 
 	hornet_mips24k_cp0_setup
@@ -404,6 +406,8 @@
 	.set	push
 	.set	noreorder
 
+	mips_cpu_setup
+
 	hornet_mips24k_cp0_setup
 
 	hornet_1_1_war
-- 
2.41.0