[PATCH v2] ARM: i.MX6: Specify OCRAM base address and size

[John Watts]

The i.MX6 includes some on-chip RAM: 128KiB on most variants, with 256KiB on
the Dual and Quad variants.

This region is where the first stage of Barebox gets loaded if RAM
initialization isn't hard coded using DCD information.

Add the base address and size so it can be used to calculate where to put the
stack at boot.

Signed-off-by: John Watts <contact at jookia.org>
---
Changes v1 -> v2:
- Fixed wrong size (thanks Marco!)
---
 arch/arm/mach-imx/include/mach/imx6-regs.h | 6 ++++++
 1 file changed, 6 insertions(+)

diff --git a/arch/arm/mach-imx/include/mach/imx6-regs.h b/arch/arm/mach-imx/include/mach/imx6-regs.h
index 39e2751533..89a3b267c6 100644
--- a/arch/arm/mach-imx/include/mach/imx6-regs.h
+++ b/arch/arm/mach-imx/include/mach/imx6-regs.h
@@ -3,6 +3,12 @@
 #ifndef __MACH_IMX6_REGS_H
 #define __MACH_IMX6_REGS_H
 
+#include <linux/sizes.h>
+
+/* Set MAX_SIZE to 128K, only the Quad and Dual have 256K */
+#define MX6_OCRAM_BASE_ADDR		0x00900000
+#define MX6_OCRAM_MAX_SIZE		SZ_128K
+
 #define MX6_APBH_BASE_ADDR		0x00110000
 #define MX6_GPMI_BASE_ADDR		0x00112000
 #define MX6_BCH_BASE_ADDR		0x00114000
-- 
2.39.1