[PATCH 0/4] ARM: imx: Fix problem with imx8 SDRAM size calculation

[Sascha Hauer]

On Fri, Feb 25, 2022 at 03:47:47PM +0100, Joacim Zetterling wrote:
> There is some issues with the imx8 ddrc sdram size calculation.
> 
> If we compare the imx8mn DDR4 evk against the LPDDR4 variant in
> code and in the datasheets, we see the following:
> 
>              DDR4   LPDDR4
>   ========================
>   Bus width   16      16
>   Rank        1       1
>   Ranks       1       1
>   Banks       4       8
>   Banks grps  2       1
>   Rows        17      15
>   Col         10      10
> 
> This gives us the following problems:
> 
> 1. Bus width problem.
>    Does not support 16 bit SDRAM bus mode, only 32 bit supported
> 
> 2. Row size problem.
>    Only up to 16 bit row size support.
> 
> 3. Bank groups support.
>    Only support of 1 bank group.
> 
> 4. Bit count problem.
>    The imx_ddrc_count_bits function does not do a correct count.
>    Found out during test of the 1-3 part fixes.
> 
> The fact that the code only handled a 32 bit bus width, compensated
> the problems with rows, banks and rank.
> 
> This have been tested on the NXP IMX8MN-EVK with 2GB DDR4 SDRAM as
> well as on a custom board with 512MB LPDDR4 SDRAM.
> 
> 
> Joacim Zetterling (4):
>   ARM: imx: Add imx8 support for 18 bit SDRAM row size handle
>   ARM: imx: Add imx8 support for SDRAM with two or more bank groups
>   ARM: imx: Correct mem size calculation for 4/8/16/32 bit bus width
>   ARM: imx: Correct bit count function
> 
>  arch/arm/mach-imx/esdctl.c | 61 +++++++++++++++++++++++++-------------
>  1 file changed, 41 insertions(+), 20 deletions(-)

Applied, thanks

Sascha

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