[PATCH 0/4] ARM: imx: Fix problem with imx8 SDRAM size calculation
sha at pengutronix.de
Mon Feb 28 01:46:24 PST 2022
On Fri, Feb 25, 2022 at 03:47:47PM +0100, Joacim Zetterling wrote:
> There is some issues with the imx8 ddrc sdram size calculation.
> If we compare the imx8mn DDR4 evk against the LPDDR4 variant in
> code and in the datasheets, we see the following:
> DDR4 LPDDR4
> Bus width 16 16
> Rank 1 1
> Ranks 1 1
> Banks 4 8
> Banks grps 2 1
> Rows 17 15
> Col 10 10
> This gives us the following problems:
> 1. Bus width problem.
> Does not support 16 bit SDRAM bus mode, only 32 bit supported
> 2. Row size problem.
> Only up to 16 bit row size support.
> 3. Bank groups support.
> Only support of 1 bank group.
> 4. Bit count problem.
> The imx_ddrc_count_bits function does not do a correct count.
> Found out during test of the 1-3 part fixes.
> The fact that the code only handled a 32 bit bus width, compensated
> the problems with rows, banks and rank.
So this means this series causes a regression in between which is fixed
at the end of the series, right?
I think this is ok in this case and is better than putting everything in
a single patch. I just want to make sure everyone who bisects barebox
and ends up in one of these patches and likely reads this thread knows
that this is expected.
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