CRC32 verification on NAND flash

[Yunus Bas]

Hello everyone,

I have a question regarding the Barebox checksum verification on NAND-
partitions. To verificate that the Barebox has been flashed correctly,
we do a crc32 check on the nand.bb-partition. The offsets for the slots
are derived from the max partition, so that the slots are equally
sized. The bb-partitions are badblock-aware partitions, meaning that
the bad-marked blocks are just skipped. This means, that the overall
size of the bb-partition also decreases relative to the number of bad-
blocks. Our problem here is, in case a badblock occurs on a block prior
to the slots, the offset to the slots where the Barebox-code resides in
the bb-partition also changes.

Here an example:
The startpage of slot1 is 0x240000. This is the real address, where
Barebox is flashed into and can also be dumped using the original
nand0-partition. Now, when a bad-block occurs prior to the startpage of
slot1, let's take for example the block at 0x140000, then offset of
slot1 changes also in the nand0.bb partition. In the original partition
nand0, slot1 is still at 0x240000, but on nand0.bb, slot1 has been
moved one block prior to the original offset and changed to 0x220000.

Taking into account that with time the NAND cells will worn out and
degrate even more, we need to calculate the offset for every board to-
be tested and perform the crc32 check after that.
Using the original nand0-partition is also out of option, since the
verification would also fail when a badblock would occur somewhere in
the slot-area (in case of the above example, 0x260000).

Is there a proper way to do a checksum verification on NAND-flash,
which I'm not familiar with? Can the size of the partitions be somehow
determined dynamically? How do the experts handle this?

Thank you in advance.
-- 
With Regards,
Yunus Bas

-Software Engineer-
PHYTEC Messtechnik GmbH
Robert-Koch-Str. 39
55129 Mainz
Germany
Tel.: +49 (0)6131 9221- 466
Web: www.phytec.de

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