New RISCV board (cartesi-machine)
Ahmad Fatoum
a.fatoum at pengutronix.de
Thu Sep 16 14:21:44 PDT 2021
Hi Marcelo,
On 16.09.21 20:01, Marcelo Politzer wrote:
>> Like this? :-)
>>
>> https://www.barebox.org/jsbarebox/
>
> That is cool!
:>
>>> OK, I'll clean this up and send it as two patches:
>>> - serial_sbi
>>> - cartesi (board)
>>
>> Sounds good.
>
> Patches attached, please review at your convenience.
Please resend without attachment if possible (e.g. with git send-email).
This makes it easier to review.
Some comments:
- Signed-off-by is required, just as with Linux. See https://developercertificate.org/
- A short commit message would be nice
- BOARD_CARTESI should depend on SOC_VIRT for uniformity with other boards
- Can you change device tree compatible? Generic boards should remain generic
and not contain vendor-specific stuff.
- Please add your new Kconfig options to virt64_defconfig. That way you can build
and use the same image for all Virt-based boards (You can still use a different
config in your BSP of course)
Serial driver:
- remove DEBUG defines
- depends on RISCV (otherwise there is no <asm/sbi.h>)
- You don't need to implement flush and setbrg
- ucb,htif0 is an unrelated device, but there is no device tree
node, you can bind to. You can register a device in sbi_init
and match against that. See riscv-timer for an example
- I don't understand the point of the ring buffer. A command would
be nice (e.g. This is needed, because SBI lacks a FIFO or such)
- to_priv unused
Cheers,
Ahmad
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