[PATCH v1 2/2] net: phy: micrel: port clock select support

[Oleksij Rempel]

On Wed, Oct 13, 2021 at 01:48:20AM -0700, Trent Piepho wrote:
> On Wed, Oct 13, 2021 at 12:29 AM Oleksij Rempel <o.rempel at pengutronix.de> wrote:
> > > Note that not just KSZ8081 has this bit.  Also KSZ8021, KSZ8031, and
> > > KSZ8051, which has the existing different method to handle it, as
> > > described earlier.
> >
> > ok, i'll sync all of this PHYs with the state of the kernel driver.
> > The board fixups should be removed by someone who can confirm it.
> 
> If you copy the entire kernel driver you will massively bloat this
> code with stuff that is totally unused.

Yes.

> > > > +static int kszphy_rmii_clk_sel(struct phy_device *phydev, bool val)
> > > > +{
> > > > +       int ctrl;
> > > > +
> > > > +       ctrl = phy_read(phydev, MII_KSZPHY_CTRL);
> > > > +       if (ctrl < 0)
> > > > +               return ctrl;
> > > > +
> > > > +       if (val)
> > > > +               ctrl |= KSZPHY_RMII_REF_CLK_SEL;
> > > > +       else
> > > > +               ctrl &= ~KSZPHY_RMII_REF_CLK_SEL;
> > > > +
> > > > +       return phy_write(phydev, MII_KSZPHY_CTRL, ctrl);
> > > > +}
> > >
> > > phy_set_bits(phydev, MII_KSZPHY_CTRL, KSZ8051_RMII_50MHZ_CLK);
> >
> > No, it should be synced with kernel not in the opposite way.
> 
> If you want the code to match, then improve the kernel code rather
> than make Barebox code worse.  phy_set_bits, phy_clear_bits and
> phy_modify exist.  One can not use them if a kernel driver has not
> been refactored to use them?

Sure. Can you please show example of the kszphy_rmii_clk_sel() refactoring.
And how much optimization will it introduce? Please compared with disassembled
part. 

Regards,
Oleksij
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