NXP Layerscape
Ahmad Fatoum
a.fatoum at pengutronix.de
Fri Jun 11 01:29:51 PDT 2021
Hello Barbier,
On 10.06.21 18:40, Barbier, Renaud wrote:
> I did find a barebox handler for the tqmls1046a but not the ls1046a.
Oh, I see.
> I guess they would work the same.
> It references /dev/qspiflash0.barebox
>
> Then I just found arch/arm64/dts/fsl-ls1046a-rdb.dts. It does reference barebox in to esdhc not in qspi
This would explain why barebox_update -l doesn't list qspi, but you aren't getting
that far, apparently.
> I am programming barebox into the QSPI with barebox-ls1046ardb-qspi.image Could that be why it is not running, having no QSPI node enabled?
> I guess I need to augment arch/arm64/dts/fsl-ls1046a-rdb.dts to have QSPI support.
> Not too familiar with the use of DTB in barebox at present.
That shouldn't matter. barebox header should contain the necessary bits for muxing/clocks.
Device-Tree only becomes relevant later, when barebox itself needs to read/write the flash.
I'd postpone QSPI for now and check whether SD-Card boot works at all.
Cheers,
Ahmad
>
> -----Original Message-----
> From: Ahmad Fatoum <a.fatoum at pengutronix.de>
> Sent: 10 June 2021 17:14
> To: Barbier, Renaud <renaud.barbier at abaco.com>
> Subject: Re: NXP Layerscape
>
>
>
> [**EXTERNAL SOURCE**]:Please verify the source before clicking link or opening attachment.
>
> Hi Renaud,
>
> (please keep mailing list CC'd)
>
> On 10.06.21 16:53, Barbier, Renaud wrote:
>> I am not using a USB serial adapter. Currently I have a RJ-45 to RS232 to my laptop.
>>
>> Should not BOOTLOCPTR be set I the PBI. I see 0x40100000 for U-boot and 0x10000000 for barebox. Unless it does not apply for PPA boot flow.
>
> I don't know about the specifics of the first stage boot on the Layerscape, I just wanted to point you at the docs and ask if the steps I had documented there work for you or not.
>
> Cheers,
> Ahmad
>
>>
>> -----Original Message-----
>> From: Ahmad Fatoum <a.fatoum at pengutronix.de>
>> Sent: 10 June 2021 15:09
>> To: Barbier, Renaud <renaud.barbier at abaco.com>; Barebox List
>> <barebox at lists.infradead.org>
>> Subject: Re: NXP Layerscape
>>
>>
>>
>> [**EXTERNAL SOURCE**]:Please verify the source before clicking link or opening attachment.
>>
>> Hello Barbier,
>>
>> On 10.06.21 15:49, Barbier, Renaud wrote:
>>> I received a NXP LS1046A-RDB
>>
>> It doesn't reboot cleanly with a USB serial adapter attached!
>> Jfyi, gave me a scare first time, when I thought I broke something ^^.
>>
>>>
>>> I built barebox for the LS1046A and got the image barebox-ls1046ardb-qspi.image.
>>> I programmed the image in the alternative SPI bank as per NXP instructions:
>>> => tftp $load_addr
>>> => sf erase 0 +$filesize && sf write $load_addr 0 $filesize
>>>
>>> Barebox does not boot.
>>>
>>> I did notice that u-boot is at address 0x40100000 while the RCW is at 0x40000000.
>>> My understanding is that barebox is one image and shall be programmed
>>> at offset 0 of the SPI (0x40000000)
>>
>> Can't comment on that. Sascha did the integration.
>>
>>> At present I cannot connect my I.C.E. due a pin stuck in my MIPI connector.
>>>
>>> Any return on experience is welcome.
>>
>> Can comment on that: Last time I did this, I wrote some documentation:
>> https://nam11.safelinks.protection.outlook.com/?url=https%3A%2F%2Fwww.
>> barebox.org%2Fdoc%2Flatest%2Fboards%2Flayerscape.html&data=04%7C01
>> %7Crenaud.barbier%40abaco.com%7C0e00e06c3236419cae1108d92c2acefe%7Ce6f
>> 27451899d4d0db8fa88baafa551a7%7C0%7C0%7C637589384654589155%7CUnknown%7
>> CTWFpbGZsb3d8eyJWIjoiMC4wLjAwMDAiLCJQIjoiV2luMzIiLCJBTiI6Ik1haWwiLCJXV
>> CI6Mn0%3D%7C1000&sdata=OUk8SFTmrlH0U%2F8aiXZonQHxLplyEjlMtc7Y5JHx%
>> 2BUk%3D&reserved=0
>>
>> There I flashed barebox from another barebox booted from SD-Card.
>> I'd assume that should still work. I can't recall how the CPLD needed to be tickled, but it would be helpful to know whether doing it like described in the documentation doesn't work for you.
>>
>> Cheers,
>> Ahmad
>>
>>>
>>> Cheers,
>>> Renaud
>>>
>>>
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>>> D&reserved=0
>>>
>>
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> Pengutronix e.K. | |
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