barebox PBL question

[Wadim Egorov]

Hi,

I would like to add SPL support for the RK3288 SoC to barebox. But I am
facing
a few problems.

The maximum size of the SPL image which the ROM code will read is 32KB.
I was thinking to use the PBL feature for the SPL part. But using the
the pbl code (with decompression) seems to be not a good idea, because
it's size
is already about 30K. I think this is an overhead.

But now I wonder how to generate two different images with a single build.
A SPL image, which should not exceed 32K and a barebox.

I have problems to fully understand the PBL mechanism.
Why are the builds always adding the barebox.bin images to the PBL part?

Here is an example, cat .zbarebox.cmd

ld -EL  -Map arch/arm/pbl/zbarebox.map --gc-sections -static -o
arch/arm/pbl/zbarebox -e pbl_start -T arch/arm/pbl/zbarebox.lds
--start-group  common/built-in-pbl.o [...]  arch/arm/pbl/piggy.shipped.o
--end-group

piggy.shipped.o is barebox.bin, which is added in piggy.shipped.S:

.incbin "arch/arm/pbl/piggy.shipped"

So my question is, how do I generate a seperate PBL image without the
piggy stuff?
My SPL code for RK3288 should just init the SDRAM an then jump back to
ROM code to load the barebox.

Regards,
Wadim