[PATCH 2/9] clk: implement CLK_OPS_PARENT_ENABLE

[Sascha Hauer]

Some clocks may only be modified when their parent clocks are enabled.
The kernel has the CLK_OPS_PARENT_ENABLE flag for this purpose.
Implement it for barebox aswell.

Signed-off-by: Sascha Hauer <s.hauer at pengutronix.de>
---
 drivers/clk/clk.c   | 31 +++++++++++++++++++++++++++----
 include/linux/clk.h |  2 ++
 2 files changed, 29 insertions(+), 4 deletions(-)

diff --git a/drivers/clk/clk.c b/drivers/clk/clk.c
index 6f3053727..93e000c6e 100644
--- a/drivers/clk/clk.c
+++ b/drivers/clk/clk.c
@@ -141,6 +141,7 @@ int clk_set_rate(struct clk *clk, unsigned long rate)
 {
 	struct clk *parent;
 	unsigned long parent_rate = 0;
+	int ret;
 
 	if (!clk)
 		return 0;
@@ -148,14 +149,26 @@ int clk_set_rate(struct clk *clk, unsigned long rate)
 	if (IS_ERR(clk))
 		return PTR_ERR(clk);
 
+	if (!clk->ops->set_rate)
+		return -ENOSYS;
+
 	parent = clk_get_parent(clk);
-	if (parent)
+	if (parent) {
 		parent_rate = clk_get_rate(parent);
 
-	if (clk->ops->set_rate)
-		return clk->ops->set_rate(clk, rate, parent_rate);
+		if (clk->flags & CLK_OPS_PARENT_ENABLE) {
+			ret = clk_enable(parent);
+			if (ret)
+				return ret;
+		}
+	}
+
+	ret = clk->ops->set_rate(clk, rate, parent_rate);
+
+	if (parent && clk->flags & CLK_OPS_PARENT_ENABLE)
+		clk_disable(parent);
 
-	return -ENOSYS;
+	return ret;
 }
 
 struct clk *clk_lookup(const char *name)
@@ -203,8 +216,18 @@ int clk_set_parent(struct clk *clk, struct clk *newparent)
 	if (clk->enable_count)
 		clk_enable(newparent);
 
+	if (clk->flags & CLK_OPS_PARENT_ENABLE) {
+		clk_enable(curparent);
+		clk_enable(newparent);
+	}
+
 	ret = clk->ops->set_parent(clk, i);
 
+	if (clk->flags & CLK_OPS_PARENT_ENABLE) {
+		clk_disable(curparent);
+		clk_disable(newparent);
+	}
+
 	if (clk->enable_count)
 		clk_disable(curparent);
 
diff --git a/include/linux/clk.h b/include/linux/clk.h
index 8cb9731f1..697ab4ff4 100644
--- a/include/linux/clk.h
+++ b/include/linux/clk.h
@@ -198,6 +198,8 @@ static inline int clk_set_rate(struct clk *clk, unsigned long rate)
 #ifdef CONFIG_COMMON_CLK
 
 #define CLK_SET_RATE_PARENT     (1 << 0) /* propagate rate change up one level */
+/* parents need enable during gate/ungate, set rate and re-parent */
+#define CLK_OPS_PARENT_ENABLE   (1 << 12)
 
 #define CLK_GATE_INVERTED	(1 << 0)
 #define CLK_GATE_HIWORD_MASK	(1 << 1)
-- 
2.11.0