[PATCH] ARM: mxs: add parameter to mx28_mem_init to allow custom memory config

[Sascha Hauer]

On Mon, May 09, 2016 at 12:58:17PM +0200, Uwe Kleine-König wrote:
> Rename the already global array of default memory settings to make the
> intended usage more obvious.
> 
> Also make generous use of the const keyword.
> 
> Signed-off-by: Uwe Kleine-König <u.kleine-koenig at pengutronix.de>
> ---
>  arch/arm/boards/duckbill/lowlevel.c           |  2 +-
>  arch/arm/boards/freescale-mx28-evk/lowlevel.c |  2 +-
>  arch/arm/boards/karo-tx28/lowlevel.c          |  2 +-
>  arch/arm/mach-mxs/include/mach/init.h         |  4 ++--
>  arch/arm/mach-mxs/mem-init.c                  | 12 ++++++------
>  5 files changed, 11 insertions(+), 11 deletions(-)

Applied, thanks

Sascha

> 
> diff --git a/arch/arm/boards/duckbill/lowlevel.c b/arch/arm/boards/duckbill/lowlevel.c
> index 49563a0876e0..c00a9a0b0423 100644
> --- a/arch/arm/boards/duckbill/lowlevel.c
> +++ b/arch/arm/boards/duckbill/lowlevel.c
> @@ -55,7 +55,7 @@ static noinline void duckbill_init(void)
>  
>  	pr_debug("initializing SDRAM...\n");
>  
> -	mx28_mem_init();
> +	mx28_mem_init(mx28_dram_vals_default);
>  
>  	pr_debug("DONE\n");
>  }
> diff --git a/arch/arm/boards/freescale-mx28-evk/lowlevel.c b/arch/arm/boards/freescale-mx28-evk/lowlevel.c
> index 1f567568da54..4d45a03ba289 100644
> --- a/arch/arm/boards/freescale-mx28-evk/lowlevel.c
> +++ b/arch/arm/boards/freescale-mx28-evk/lowlevel.c
> @@ -47,7 +47,7 @@ static noinline void freescale_mx28evk_init(void)
>  
>  	pr_debug("initializing SDRAM...\n");
>  
> -	mx28_mem_init();
> +	mx28_mem_init(mx28_dram_vals_default);
>  
>  	pr_debug("DONE\n");
>  }
> diff --git a/arch/arm/boards/karo-tx28/lowlevel.c b/arch/arm/boards/karo-tx28/lowlevel.c
> index 96a8b9bfc66b..d072637de7d8 100644
> --- a/arch/arm/boards/karo-tx28/lowlevel.c
> +++ b/arch/arm/boards/karo-tx28/lowlevel.c
> @@ -47,7 +47,7 @@ static noinline void karo_tx28_init(void)
>  
>  	pr_debug("initializing SDRAM...\n");
>  
> -	mx28_mem_init();
> +	mx28_mem_init(mx28_dram_vals_default);
>  
>  	pr_debug("DONE\n");
>  }
> diff --git a/arch/arm/mach-mxs/include/mach/init.h b/arch/arm/mach-mxs/include/mach/init.h
> index 90b413e47ee4..6526d303a1a4 100644
> --- a/arch/arm/mach-mxs/include/mach/init.h
> +++ b/arch/arm/mach-mxs/include/mach/init.h
> @@ -18,11 +18,11 @@ void mx28_power_init(int __has_battery, int __use_battery_input,
>  		int __use_5v_input);
>  void mxs_power_wait_pswitch(void);
>  
> -extern uint32_t mx28_dram_vals[];
> +extern const uint32_t mx28_dram_vals_default[190];
>  extern uint32_t mx23_dram_vals[];
>  
>  void mx23_mem_init(void);
> -void mx28_mem_init(void);
> +void mx28_mem_init(const uint32_t dram_vals[190]);
>  void mxs_mem_setup_cpu_and_hbus(void);
>  void mxs_mem_setup_vdda(void);
>  void mxs_mem_init_clock(unsigned char divider);
> diff --git a/arch/arm/mach-mxs/mem-init.c b/arch/arm/mach-mxs/mem-init.c
> index 43165ac100e4..ac8bfee18e7c 100644
> --- a/arch/arm/mach-mxs/mem-init.c
> +++ b/arch/arm/mach-mxs/mem-init.c
> @@ -87,7 +87,7 @@ int mxs_early_reset_block(struct mxs_register_32 *reg)
>  	return 0;
>  }
>  
> -uint32_t mx28_dram_vals[] = {
> +const uint32_t mx28_dram_vals_default[190] = {
>  /*
>   * i.MX28 DDR2 at 200MHz
>   */
> @@ -158,12 +158,12 @@ uint32_t mx23_dram_vals[] = {
>  	0x00010000
>  };
>  
> -static void mx28_initialize_dram_values(void)
> +static void mx28_initialize_dram_values(const uint32_t dram_vals[190])
>  {
>  	int i;
>  
> -	for (i = 0; i < ARRAY_SIZE(mx28_dram_vals); i++)
> -		writel(mx28_dram_vals[i], IMX_SDRAMC_BASE + (4 * i));
> +	for (i = 0; i < 190; i++)
> +		writel(dram_vals[i], IMX_SDRAMC_BASE + (4 * i));
>  }
>  
>  static void mx23_initialize_dram_values(void)
> @@ -320,7 +320,7 @@ void mx23_mem_init(void)
>  
>  #define PINCTRL_EMI_DS_CTRL_DDR_MODE_DDR2	(0x3 << 16)
>  
> -void mx28_mem_init(void)
> +void mx28_mem_init(const uint32_t dram_vals[190])
>  {
>  	mxs_early_delay(11000);
>  
> @@ -338,7 +338,7 @@ void mx28_mem_init(void)
>  	/* Clear START bit from DRAM_CTL16 */
>  	clrbits_le32(IMX_SDRAMC_BASE + 0x40, 1);
>  
> -	mx28_initialize_dram_values();
> +	mx28_initialize_dram_values(dram_vals);
>  
>  	/* Clear SREFRESH bit from DRAM_CTL17 */
>  	clrbits_le32(IMX_SDRAMC_BASE + 0x44, 1);
> -- 
> 2.8.0.rc3
> 
> 
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