[PATCH] imx6-mmdc: fix automatic power down enable in write level calibration

[Sascha Hauer]

Hi Eric,

On Fri, Oct 23, 2015 at 12:49:44PM -0700, Eric Nelson wrote:
> Bit 0 of the MAPSR register controls auto power down.
> 
> Explicitly clear this bit instead of reserved bit when
> exiting from mmdc_do_write_level_calibration().
> 
> Signed-off-by: Eric Nelson <eric at nelint.com>

Looks good, applied. Did this bug have any practical impacts?

Sascha

> ---
>  arch/arm/mach-imx/imx6-mmdc.c | 4 ++--
>  1 file changed, 2 insertions(+), 2 deletions(-)
> 
> diff --git a/arch/arm/mach-imx/imx6-mmdc.c b/arch/arm/mach-imx/imx6-mmdc.c
> index 64fb624..40fe0cf 100644
> --- a/arch/arm/mach-imx/imx6-mmdc.c
> +++ b/arch/arm/mach-imx/imx6-mmdc.c
> @@ -103,9 +103,9 @@ int mmdc_do_write_level_calibration(void)
>  	val |= 0x00005500;
>  	writel(val, (P0_IPS + MDPDC));
>  
> -	/* enable Adopt power down timer: */
> +	/* enable auto power down timer: */
>  	val = readl(P0_IPS + MAPSR);
> -	val &= 0xfffffff7;
> +	val &= ~1;
>  	writel(val, (P0_IPS + MAPSR));
>  
>  	/* clear CON_REQ */
> -- 
> 2.6.2
> 
> 

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