ARM: UBI/UBIFS on spi-nor

Rolf Evers-Fischer embedded24 at
Mon Mar 16 02:13:11 PDT 2015

> I have a cortex-A9 based platform featuring a spi-nor (n25q256a).

> Copying a bigger file (512KB) leads to a read failure
> Has anybody used UBI/UBIFS on spi-nor successfully or seen a similar 

I've recently used UBI/UBIFS with a cortex-A7 based platform featuring a 
spi-nor from Spansion (s25fl256). I had to introduce some changes for the 
4-byte-mode, which will be set automatically, if barebox detects a flash 
memory with more than 16MByte, because I was not able to reboot my 
platform. But it seems that your problem is a different one.

I've just downloaded the datasheet of the n25q256a, and it seems that this 
chip reports the JEDEC_MFR of ST (0x20), but needs the 4-byte CMD of 
Macronix (0xb7).

This combination is currently not supported by barebox, but if you add an 
additional 'case: CFI_MRF_ST' line to your 'set_4byte()' function, it 
should hopefully work:

diff --git a/drivers/mtd/devices/m25p80.c b/drivers/mtd/devices/m25p80.c
index 095a4ca..f54eb1f 100644
--- a/drivers/mtd/devices/m25p80.c
+++ b/drivers/mtd/devices/m25p80.c
@@ -157,6 +157,7 @@ static inline int set_4byte(struct m25p *flash, u32 
jedec_id, int enable)
 	switch (JEDEC_MFR(jedec_id)) {
+	case CFI_MFR_ST:
 		flash->command[0] = enable ? OPCODE_EN4B : OPCODE_EX4B;
 		return spi_write(flash->spi, flash->command, 1);

Best regards,

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