[PATCH] sama5d3x: fix AT91_SMC_CS offset stride

[Bo Shen]

Hi J,

On 05/29/2014 08:11 PM, Jean-Christophe PLAGNIOL-VILLARD wrote:
>
> On May 29, 2014, at 5:55 PM, Matteo Fortini <matteo.fortini at gmail.com> wrote:
>
>>
>> Acked-by: Bo Shen <voice.shen at atmel.com>
>> ---
>> arch/arm/mach-at91/sam9_smc.c | 4 ++++
>> 1 file changed, 4 insertions(+)
>>
>> diff --git a/arch/arm/mach-at91/sam9_smc.c b/arch/arm/mach-at91/sam9_smc.c
>> index a137da4..65c4558 100644
>> --- a/arch/arm/mach-at91/sam9_smc.c
>> +++ b/arch/arm/mach-at91/sam9_smc.c
>> @@ -16,7 +16,11 @@
>>
>> #include <mach/at91sam9_smc.h>
>>
>> +#ifdef CONFIG_ARCH_SAMA5D3
>> +#define AT91_SMC_CS(id, n)	(smc_base_addr[id] + ((n) * 0x14))
>> +#else
>> #define AT91_SMC_CS(id, n)	(smc_base_addr[id] + ((n) * 0x10))
>> +#endif
> NACK no ifdef
>
> this need to be runtime

Oh, this make me read more and think more. The mode register in SMC on 
sama5d3 SoC also has different offset.

So, how about move this into <mach/at91sam9_smc.h>, or create a new 
<mach/sama5_smc.h>, and then, use #ifdef to choose different SoC? If 
this not acceptable, can we use #ifdef in <mach/at91sam9_smc.h>?

> and you need to put our SOB
>>
>> static void __iomem *smc_base_addr[2];
>>
>> --
>> 2.0.0.rc2

Best Regards,
Bo Shen