[PATCH v2 4/7] ARM: dts: add minimal К1879ХБ1Я devicetree file
Antony Pavlov
antonynpavlov at gmail.com
Thu May 22 12:48:47 PDT 2014
К1879ХБ1Я (AKA K1879HB1YA) is a SoC that combines
a NeuroMatrix(r) family DSP core
with an ARM architecture CPU ARM1176JZF-S core.
See http://www.module.ru/en/catalog/micro/mikroshema_dekodera_cifrovogo_televizionnogo_signala_sbis_k1879hb1ya/ for details.
Signed-off-by: Antony Pavlov <antonynpavlov at gmail.com>
---
arch/arm/dts/k1879hb1ya.dtsi | 37 +++++++++++++++++++++++++++++++++++++
1 file changed, 37 insertions(+)
diff --git a/arch/arm/dts/k1879hb1ya.dtsi b/arch/arm/dts/k1879hb1ya.dtsi
new file mode 100644
index 0000000..83ba7fb
--- /dev/null
+++ b/arch/arm/dts/k1879hb1ya.dtsi
@@ -0,0 +1,37 @@
+#include "skeleton.dtsi"
+
+/ {
+ soc {
+ compatible = "simple-bus";
+ model = "RC Module K1879HB1YA";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges;
+
+ /*
+ * Actually clk_apb is not a fixed-clock at all.
+ * clk_apb is a derivated clock, but for the moment
+ * there is no public documentation on k1879hb1ya
+ * so we can't describe it correctly.
+ */
+ clk_apb: clock at 0 {
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ };
+
+ serial0: serial at 2002b000 {
+ compatible = "ns16550a";
+ reg = <0x2002b000 0x1000>;
+ reg-shift = <2>;
+ clocks = <&clk_apb 0>;
+ status = "disabled";
+ };
+
+ timer0: timer at 20024000 {
+ compatible = "module,uemd-timer";
+ reg = <0x20024000 0x20>;
+ clocks = <&clk_apb 0>;
+ status = "disabled";
+ };
+ };
+};
--
1.9.2
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