Porting barebox to Novena: misc questions

[Sean Cross]

On 17/3/14 3:18 PM, Sascha Hauer wrote:
> On Mon, Mar 17, 2014 at 12:28:28PM +0800, Sean Cross wrote:
>> Here is the resulting output and BUG from this run:
>>
>> barebox 2014.03.0-00628-g7fed07d-dirty #158 Mon Mar 17 12:25:45 SGT 2014
>>
>>
>> Board: Kosagi i.MX6DL Novena Board
>> detected i.MX6 DualLite revision 1.1
>> Trying to request region ttb (from 0x4fff4000:0x4fff7fff): ok
>> Trying to request region malloc space (from 0x4be00000:0x4fdfffff): ok
>> Trying to request region barebox (from 0x4fe00000:0x4fe4b4a7): ok
>> Trying to request region barebox data (from 0x4fe4b4a8:0x4fe5c8f7): ok
>> Trying to request region bss (from 0x4fe5c8f8:0x4fe6214f): ok
>> Trying to request region stack (from 0x4fff8000:0x4fffffff): ok
>> mmu: find_pte: TTB for address 0x4cd1e000 is not of type table
>> mmu: Memory banks:
>> mmu: #0 0x10000000 - 0xffffffff
> 
> So you have one memory bank that starts at 0x10000000 which is the
> standard SDRAM base for i.MX6. Good. But why is the size 0? Have you
> specified this in your devicetree? It should contain the correct size.
> It could also be that we do not parse #ddress-cells / #size-cells
> correctly (in case one of these is not 1 in your devicetree).

There is no "memory" node in my .dts file, so it's inheriting the
default "memory { device_type = "memory"; reg = <0 0>; };" from
skeleton.dtsi.  I add memory in my board.c file:

static int kosagi_novena_mem_init(void)
{
        /* Pull out RAM capacity, which was stored here in lowlevel.c */
        arm_add_mem_device("ram0", 0x10000000, readl(MX6_SRC_BASE_ADDR +
0x20));
        return 0;
}
mem_initcall(kosagi_novena_mem_init);