[PATCH 06/18] tegra: add Tegra3 ramsize detection

Lucas Stach dev at lynxeye.de
Sun Apr 13 06:27:36 PDT 2014


Signed-off-by: Lucas Stach <dev at lynxeye.de>
---
 arch/arm/mach-tegra/include/mach/lowlevel.h  | 21 +++++++++++++++++++++
 arch/arm/mach-tegra/tegra_maincomplex_init.c |  6 +++++-
 2 files changed, 26 insertions(+), 1 deletion(-)

diff --git a/arch/arm/mach-tegra/include/mach/lowlevel.h b/arch/arm/mach-tegra/include/mach/lowlevel.h
index cc346a023d2c..d7b6f1e994fc 100644
--- a/arch/arm/mach-tegra/include/mach/lowlevel.h
+++ b/arch/arm/mach-tegra/include/mach/lowlevel.h
@@ -39,6 +39,7 @@
 
 #define T20_ODMDATA_RAMSIZE_SHIFT	28
 #define T20_ODMDATA_RAMSIZE_MASK	(3 << T20_ODMDATA_RAMSIZE_SHIFT)
+#define T30_ODMDATA_RAMSIZE_MASK	(0xf << T20_ODMDATA_RAMSIZE_SHIFT)
 #define T20_ODMDATA_UARTTYPE_SHIFT	18
 #define T20_ODMDATA_UARTTYPE_MASK	(3 << T20_ODMDATA_UARTTYPE_SHIFT)
 #define T20_ODMDATA_UARTID_SHIFT	15
@@ -124,6 +125,26 @@ uint32_t tegra20_get_ramsize(void)
 	}
 }
 
+static __always_inline
+uint32_t tegra30_get_ramsize(void)
+{
+	switch ((tegra_get_odmdata() & T30_ODMDATA_RAMSIZE_MASK) >>
+			T20_ODMDATA_RAMSIZE_SHIFT) {
+	case 0:
+	case 1:
+	default:
+		return SZ_256M;
+	case 2:
+		return SZ_512M;
+	case 3:
+		return SZ_512M + SZ_256M;
+	case 4:
+		return SZ_1G;
+	case 8:
+		return SZ_2G - SZ_1M;
+	}
+}
+
 static long uart_id_to_base[] = {
 	TEGRA_UARTA_BASE,
 	TEGRA_UARTB_BASE,
diff --git a/arch/arm/mach-tegra/tegra_maincomplex_init.c b/arch/arm/mach-tegra/tegra_maincomplex_init.c
index 5aad1dd65eaa..776af64aeab9 100644
--- a/arch/arm/mach-tegra/tegra_maincomplex_init.c
+++ b/arch/arm/mach-tegra/tegra_maincomplex_init.c
@@ -1,5 +1,5 @@
 /*
- * Copyright (C) 2013 Lucas Stach <l.stach at pengutronix.de>
+ * Copyright (C) 2013-2014 Lucas Stach <l.stach at pengutronix.de>
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms and conditions of the GNU General Public License,
@@ -41,6 +41,10 @@ void tegra_maincomplex_entry(void)
 		rambase = 0x0;
 		ramsize = tegra20_get_ramsize();
 		break;
+	case TEGRA30:
+		rambase = SZ_2G;
+		ramsize = tegra30_get_ramsize();
+		break;
 	default:
 		/* If we don't know the chiptype, better bail out */
 		unreachable();
-- 
1.9.0




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