[PATCH 04/18] tegra: source MSELECT clock from CLK_M

Lucas Stach dev at lynxeye.de
Sun Apr 13 06:27:34 PDT 2014


We need to reprogram PLL_P at a later time, so
we have to make sure MSELECT is able to operate
correctly when we stop PLL_P.

Signed-off-by: Lucas Stach <dev at lynxeye.de>
---
 arch/arm/mach-tegra/tegra_avp_init.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/arch/arm/mach-tegra/tegra_avp_init.c b/arch/arm/mach-tegra/tegra_avp_init.c
index 3314db45724b..1afea445acbe 100644
--- a/arch/arm/mach-tegra/tegra_avp_init.c
+++ b/arch/arm/mach-tegra/tegra_avp_init.c
@@ -164,8 +164,8 @@ static void start_cpu0_clocks(void)
 		/* init MSELECT */
 		writel(CRC_RST_DEV_V_MSELECT,
 		       TEGRA_CLK_RESET_BASE + CRC_RST_DEV_V_SET);
-		writel((CRC_CLK_SOURCE_MSEL_SRC_PLLP <<
-		       CRC_CLK_SOURCE_MSEL_SRC_SHIFT) | 2,
+		writel((CRC_CLK_SOURCE_MSEL_SRC_CLKM <<
+		       CRC_CLK_SOURCE_MSEL_SRC_SHIFT),
 		       TEGRA_CLK_RESET_BASE + CRC_CLK_SOURCE_MSEL);
 		writel(CRC_CLK_OUT_ENB_V_MSELECT,
 		       TEGRA_CLK_RESET_BASE + CRC_CLK_OUT_ENB_V);
-- 
1.9.0




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