[PATCH 3/3] ARM v7: added v7_mmu_cache_invalidate()

[Sascha Hauer]

On Tue, May 14, 2013 at 03:14:56PM +0200, Enrico Scholz wrote:
> At least the iMX6 boot rom seems to jump into barebox with a non
> invalidated d-cache which causes data corruption when
> v7_mmu_cache_flush() executed by arm_early_mmu_cache_flush() overrides
> stack or other valid data.
> 
> That's why the cache must be invalided for this processors explicitly
> (e.g. in barebox_arm_reset_vector()).  Operation differs from flush only
> in one instruction so that patch modifies the existing
> v7_mmu_cache_flush() function slightly by adding an optional argument.
> 
> Signed-off-by: Enrico Scholz <enrico.scholz at sigma-chemnitz.de>
> ---
>  arch/arm/cpu/cache-armv7.S | 22 ++++++++++++++++++----
>  1 file changed, 18 insertions(+), 4 deletions(-)
> 
> diff --git a/arch/arm/cpu/cache-armv7.S b/arch/arm/cpu/cache-armv7.S
> index 5595cf6..84c833e 100644
> --- a/arch/arm/cpu/cache-armv7.S
> +++ b/arch/arm/cpu/cache-armv7.S
> @@ -57,7 +57,17 @@ ENTRY(v7_mmu_cache_off)
>  ENDPROC(v7_mmu_cache_off)
>  
>  .section .text.v7_mmu_cache_flush
> +ENTRY(v7_mmu_cache_invalidate)
> +		mov	r0, #1
> +		b	_v7_mmu_cache_flush
> +ENDPROC(v7_mmu_cache_invalidate)
> +
>  ENTRY(v7_mmu_cache_flush)
> +		mov	r0, #0
> +		b	_v7_mmu_cache_flush
> +ENDPROC(v7_mmu_cache_flush)
> +
> +ENTRY(_v7_mmu_cache_flush)

I renamed this to __v7_mmu_cache_flush_invalidate while applying since
this function now does one of these operations depending on r0.

Sascha


-- 
Pengutronix e.K.                           |                             |
Industrial Linux Solutions                 | http://www.pengutronix.de/  |
Peiner Str. 6-8, 31137 Hildesheim, Germany | Phone: +49-5121-206917-0    |
Amtsgericht Hildesheim, HRA 2686           | Fax:   +49-5121-206917-5555 |