[PATCH 3/5] arm: initial support for Marvell Dove SoCs

[Lucas Stach]

Am Mittwoch, den 15.05.2013, 09:29 +0200 schrieb Thomas Petazzoni:
> Dear Sebastian Hesselbarth,
> 
> On Wed, 15 May 2013 08:20:03 +0200, Sebastian Hesselbarth wrote:
> 
> > it's not that easy as I thought. Armada 370 behaves very different
> > from Dove here. While Dove allows to read from unmapped adresses,
> > Armada 370 hangs immediately.
> > 
> > I will work with Thomas on this asap and find a solution, but I am
> > not sure if it will work without dirty tricks. Thomas has one in
> > mind and I tend to agree with him on this one.
> 
> Hum, then either I don't remember, or something, but I don't have a
> trick in mind. We're doing something very custom in the kernel to
> support legacy bootloaders for Armada 370/XP that were not remapping to
> 0xf1, and therefore new bootloaders for Armada 370/XP should remap to
> 0xf1 *and* set a specific CP15 to indicate the kernel that the
> remapping has already been done. So this second thing is basically what
> Barebox will have to do for Armada 370/XP platforms.
> 
> But other than that, I don't have a specific idea in mind. For the
> kernel, I've thought about the problem many times, had many discussions
> with Marvell engineers, and our conclusion is that there is not
> reliable way to detect where the registers are currently mapped.
> 
> So to me, Barebox should do the 0xf1 remapping as soon as possible in
> its initialization, for all Marvell EBU platforms, and give up the idea
> of being able to chainload a second stage Barebox.
> 
> Is there anything I'm missing?
> 

If you are indicating that the remapping was done through a specific
CP15 entry, barebox should equally be able to read this bit out and
decide if remapping has to be applied or not.

Is this CP15 bit persistent? Even if not you may be able to set it in
bootm, just before you jump to the chainloaded image.

Regards,
Lucas
-- 
Pengutronix e.K.                           | Lucas Stach                 |
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