NAND + imx53, BBT/timings?

[Vanhauwaert Wouter]

Hi all,

I'm working on a custom design which has an imx53 and a 1GB NAND flash (Samsung k9k8g08u0d) via an 8 bit bus.
So I added this imx_nand_platform_data structure with a .width=1, .hw_ecc=1 and .flash_bbt=1.
The flash gets detected at startup (also loads the bootloader from it).

nand: Manufacturer ID: 0xec, Chip ID: 0xd3 (Samsung NAND 1GiB 3,3V 8-bit), page size 2048, OOB size:64 
but then
nand: Bad block table not found for chip 0
nand: Bad block table not found for chip 0

etc

and when I do imx_nand_bbm, I get:
Bad eraseblock 0 at 0x00000000
Bad eraseblock 1 at 0x00020000
And for the rest UnCorrectable RS-ECC errors

This is a barenew flash, so I suppose I should find a factory bad block table?
I'm using the barebox 2013.05.1 stable release from git

Grtz,
Wouter