[PATCHv2 01/12] ARM: OMAP: AM33xx: Add basic NAND support

[Sascha Hauer]

On Tue, Jul 09, 2013 at 11:23:11AM +0200, Teresa Gámez wrote:
> Signed-off-by: Teresa Gámez <t.gamez at phytec.de>

Applied this series.

Thanks
 Sascha

> ---
>  arch/arm/mach-omap/am33xx_generic.c          |   15 +++++++++++++++
>  arch/arm/mach-omap/am33xx_mux.c              |    8 +++++---
>  arch/arm/mach-omap/include/mach/am33xx-mux.h |    1 +
>  arch/arm/mach-omap/include/mach/gpmc_nand.h  |    1 +
>  4 files changed, 22 insertions(+), 3 deletions(-)
> 
> diff --git a/arch/arm/mach-omap/am33xx_generic.c b/arch/arm/mach-omap/am33xx_generic.c
> index 96432c9..9806fbe 100644
> --- a/arch/arm/mach-omap/am33xx_generic.c
> +++ b/arch/arm/mach-omap/am33xx_generic.c
> @@ -27,6 +27,7 @@
>  #include <mach/am33xx-clock.h>
>  #include <mach/sys_info.h>
>  #include <mach/am33xx-generic.h>
> +#include <mach/gpmc.h>
>  
>  void __noreturn reset_cpu(unsigned long addr)
>  {
> @@ -126,3 +127,17 @@ int am33xx_register_ethaddr(int eth_id, int mac_id)
>  
>  	return -ENODEV;
>  }
> +
> +/* GPMC timing for AM33XX nand device */
> +const struct gpmc_config am33xx_nand_cfg = {
> +	.cfg = {
> +		0x00000800,	/* CONF1 */
> +		0x001e1e00,	/* CONF2 */
> +		0x001e1e00,	/* CONF3 */
> +		0x16051807,	/* CONF4 */
> +		0x00151e1e,	/* CONF5 */
> +		0x16000f80,	/* CONF6 */
> +	},
> +	.base = 0x08000000,
> +	.size = GPMC_SIZE_16M,
> +};
> diff --git a/arch/arm/mach-omap/am33xx_mux.c b/arch/arm/mach-omap/am33xx_mux.c
> index abc8586..8318713 100644
> --- a/arch/arm/mach-omap/am33xx_mux.c
> +++ b/arch/arm/mach-omap/am33xx_mux.c
> @@ -39,8 +39,6 @@ static const __maybe_unused struct module_pin_mux uart3_pin_mux[] = {
>  	{-1},
>  };
>  
> -
> -#ifdef CONFIG_NAND
>  static const __maybe_unused struct module_pin_mux nand_pin_mux[] = {
>  	{OFFSET(gpmc_ad0), (MODE(0) | PULLUP_EN | RXACTIVE)},	/* NAND AD0 */
>  	{OFFSET(gpmc_ad1), (MODE(0) | PULLUP_EN | RXACTIVE)},	/* NAND AD1 */
> @@ -59,7 +57,6 @@ static const __maybe_unused struct module_pin_mux nand_pin_mux[] = {
>  	{OFFSET(gpmc_be0n_cle), (MODE(0) | PULLUDEN)},	/* NAND_BE_CLE */
>  	{-1},
>  };
> -#endif
>  
>  static const __maybe_unused struct module_pin_mux i2c0_pin_mux[] = {
>  	{OFFSET(i2c0_sda), (MODE(0) | RXACTIVE | PULLUDEN | SLEWCTRL)},	/* I2C_DATA */
> @@ -319,3 +316,8 @@ void am33xx_enable_spi0_pin_mux(void)
>  {
>  	configure_module_pin_mux(spi0_pin_mux);
>  }
> +
> +void am33xx_enable_nand_pin_mux(void)
> +{
> +	configure_module_pin_mux(nand_pin_mux);
> +}
> diff --git a/arch/arm/mach-omap/include/mach/am33xx-mux.h b/arch/arm/mach-omap/include/mach/am33xx-mux.h
> index d6b19dd..fe3168b 100644
> --- a/arch/arm/mach-omap/include/mach/am33xx-mux.h
> +++ b/arch/arm/mach-omap/include/mach/am33xx-mux.h
> @@ -257,5 +257,6 @@ extern void am33xx_enable_uart0_pin_mux(void);
>  extern void am33xx_enable_uart2_pin_mux(void);
>  extern void am33xx_enable_mmc0_pin_mux(void);
>  extern void am33xx_enable_spi0_pin_mux(void);
> +extern void am33xx_enable_nand_pin_mux(void);
>  
>  #endif /*__AM33XX_MUX_H__ */
> diff --git a/arch/arm/mach-omap/include/mach/gpmc_nand.h b/arch/arm/mach-omap/include/mach/gpmc_nand.h
> index 4a93465..8d138ec 100644
> --- a/arch/arm/mach-omap/include/mach/gpmc_nand.h
> +++ b/arch/arm/mach-omap/include/mach/gpmc_nand.h
> @@ -65,5 +65,6 @@ int omap_add_gpmc_nand_device(struct gpmc_nand_platform_data *pdata);
>  
>  extern struct gpmc_config omap3_nand_cfg;
>  extern struct gpmc_config omap4_nand_cfg;
> +extern struct gpmc_config am33xx_nand_cfg;
>  
>  #endif				/* __ASM_OMAP_NAND_GPMC_H */
> -- 
> 1.7.0.4
> 
> 
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