[PATCH 1/4] MIPS: introduce ram0 regions register function

[Sascha Hauer]

On Sat, Jan 26, 2013 at 08:52:37PM +0400, Antony Pavlov wrote:
> On MIPS there are two segments in CPU address space that
> can be used for untranslated memory access: KSEG0 and KSEG1.
> KSEG0 is used for cached access and KSEG1 is used for
> uncached one.
> 
> The instroduced mips_add_ram0() function registers two
> address regions for memory access: one in KSEG0 and
> the other one in KSEG1.
> 
> Signed-off-by: Antony Pavlov <antonynpavlov at gmail.com>
> ---
>  arch/mips/include/asm/memory.h |   12 ++++++++++++
>  1 file changed, 12 insertions(+)
>  create mode 100644 arch/mips/include/asm/memory.h
> 
> diff --git a/arch/mips/include/asm/memory.h b/arch/mips/include/asm/memory.h
> new file mode 100644
> index 0000000..2aa28b7
> --- /dev/null
> +++ b/arch/mips/include/asm/memory.h
> @@ -0,0 +1,12 @@
> +#ifndef __ASM_MIPS_MEMORY_H
> +#define __ASM_MIPS_MEMORY_H
> +
> +#include <memory.h>
> +#include <asm/addrspace.h>
> +
> +static inline void mips_add_ram0(resource_size_t size)
> +{
> +	barebox_add_memory_bank("kseg0_ram0", KSEG0, size);
> +	barebox_add_memory_bank("kseg1_ram0", KSEG1, size);
> +}

Is kseg0/1 a common name under MIPS, or in other words, do users know
what they have here?

Why should I use the uncached RAM as a user? Is this for debugging or
does it have apractical usecase?

Sascha

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