[PATCH 2/8] mmu: add getters for pte cache flags

Alexander Aring alex.aring at gmail.com
Tue Jan 15 08:48:44 EST 2013


Currently only arm architecture provide to change pte flags.
Cache pte flags are configured at boottime.

Adding getters to get this pte flags at runtime. In additional
of remap_range you can disable or enable caching in commands, for
example memtest.

Signed-off-by: Alexander Aring <alex.aring at gmail.com>
---
 arch/arm/cpu/mmu.c              | 14 ++++++++++++++
 arch/arm/include/asm/mmu.h      | 12 ++++++++++++
 arch/blackfin/include/asm/mmu.h | 10 ++++++++++
 arch/mips/include/asm/mmu.h     | 10 ++++++++++
 arch/nios2/include/asm/mmu.h    | 10 ++++++++++
 arch/openrisc/include/asm/mmu.h | 10 ++++++++++
 arch/ppc/include/asm/mmu.h      | 10 ++++++++++
 arch/sandbox/include/asm/mmu.h  | 10 ++++++++++
 arch/x86/include/asm/mmu.h      | 10 ++++++++++
 9 files changed, 96 insertions(+)

diff --git a/arch/arm/cpu/mmu.c b/arch/arm/cpu/mmu.c
index b5c9c60..6e2ecca 100644
--- a/arch/arm/cpu/mmu.c
+++ b/arch/arm/cpu/mmu.c
@@ -52,11 +52,25 @@ extern int arm_architecture;
 #define PTE_FLAGS_CACHED_V4 (PTE_SMALL_AP_UNO_SRW | PTE_BUFFERABLE | PTE_CACHEABLE)
 #define PTE_FLAGS_UNCACHED_V4 PTE_SMALL_AP_UNO_SRW
 
+/*
+ * PTE flags to set cached and uncached areas.
+ * This will be determined at runtime.
+ */
 static uint32_t PTE_FLAGS_CACHED;
 static uint32_t PTE_FLAGS_UNCACHED;
 
 #define PTE_MASK ((1 << 12) - 1)
 
+uint32_t mmu_get_pte_cached_flags()
+{
+	return PTE_FLAGS_CACHED;
+}
+
+uint32_t mmu_get_pte_uncached_flags()
+{
+	return PTE_FLAGS_UNCACHED;
+}
+
 /*
  * Create a second level translation table for the given virtual address.
  * We initially create a flat uncached mapping on it.
diff --git a/arch/arm/include/asm/mmu.h b/arch/arm/include/asm/mmu.h
index ae1686b..f32cea6 100644
--- a/arch/arm/include/asm/mmu.h
+++ b/arch/arm/include/asm/mmu.h
@@ -43,6 +43,8 @@ unsigned long virt_to_phys(void *virt);
 void *phys_to_virt(unsigned long phys);
 void remap_range(void *_start, size_t size, uint32_t flags);
 void *map_io_sections(unsigned long physaddr, void *start, size_t size);
+uint32_t mmu_get_pte_cached_flags(void);
+uint32_t mmu_get_pte_uncached_flags(void);
 
 #else
 static inline void *dma_alloc_coherent(size_t size)
@@ -86,6 +88,16 @@ static inline void *map_io_sections(unsigned long phys, void *start, size_t size
 	return (void *)phys;
 }
 
+static inline uint32_t mmu_get_pte_cached_flags(void)
+{
+	return 0;
+}
+
+static inline uint32_t mmu_get_pte_uncached_flags(void)
+{
+	return 0;
+}
+
 #endif
 
 #ifdef CONFIG_CACHE_L2X0
diff --git a/arch/blackfin/include/asm/mmu.h b/arch/blackfin/include/asm/mmu.h
index 0485a43..eed4c33 100644
--- a/arch/blackfin/include/asm/mmu.h
+++ b/arch/blackfin/include/asm/mmu.h
@@ -5,5 +5,15 @@ static inline void remap_range(void *_start, size_t size, uint32_t flags)
 {
 }
 
+static inline uint32_t mmu_get_pte_cached_flags(void)
+{
+	return 0;
+}
+
+static inline uint32_t mmu_get_pte_uncached_flags(void)
+{
+	return 0;
+}
+
 #endif /* __ASM_MMU_H */
 
diff --git a/arch/mips/include/asm/mmu.h b/arch/mips/include/asm/mmu.h
index 0485a43..eed4c33 100644
--- a/arch/mips/include/asm/mmu.h
+++ b/arch/mips/include/asm/mmu.h
@@ -5,5 +5,15 @@ static inline void remap_range(void *_start, size_t size, uint32_t flags)
 {
 }
 
+static inline uint32_t mmu_get_pte_cached_flags(void)
+{
+	return 0;
+}
+
+static inline uint32_t mmu_get_pte_uncached_flags(void)
+{
+	return 0;
+}
+
 #endif /* __ASM_MMU_H */
 
diff --git a/arch/nios2/include/asm/mmu.h b/arch/nios2/include/asm/mmu.h
index 0485a43..eed4c33 100644
--- a/arch/nios2/include/asm/mmu.h
+++ b/arch/nios2/include/asm/mmu.h
@@ -5,5 +5,15 @@ static inline void remap_range(void *_start, size_t size, uint32_t flags)
 {
 }
 
+static inline uint32_t mmu_get_pte_cached_flags(void)
+{
+	return 0;
+}
+
+static inline uint32_t mmu_get_pte_uncached_flags(void)
+{
+	return 0;
+}
+
 #endif /* __ASM_MMU_H */
 
diff --git a/arch/openrisc/include/asm/mmu.h b/arch/openrisc/include/asm/mmu.h
index 0485a43..eed4c33 100644
--- a/arch/openrisc/include/asm/mmu.h
+++ b/arch/openrisc/include/asm/mmu.h
@@ -5,5 +5,15 @@ static inline void remap_range(void *_start, size_t size, uint32_t flags)
 {
 }
 
+static inline uint32_t mmu_get_pte_cached_flags(void)
+{
+	return 0;
+}
+
+static inline uint32_t mmu_get_pte_uncached_flags(void)
+{
+	return 0;
+}
+
 #endif /* __ASM_MMU_H */
 
diff --git a/arch/ppc/include/asm/mmu.h b/arch/ppc/include/asm/mmu.h
index af263ae..050d84b 100644
--- a/arch/ppc/include/asm/mmu.h
+++ b/arch/ppc/include/asm/mmu.h
@@ -545,4 +545,14 @@ static inline void remap_range(void *_start, size_t size, uint32_t flags)
 {
 }
 
+static inline uint32_t mmu_get_pte_cached_flags(void)
+{
+	return 0;
+}
+
+static inline uint32_t mmu_get_pte_uncached_flags(void)
+{
+	return 0;
+}
+
 #endif /* _PPC_MMU_H_ */
diff --git a/arch/sandbox/include/asm/mmu.h b/arch/sandbox/include/asm/mmu.h
index 0485a43..eed4c33 100644
--- a/arch/sandbox/include/asm/mmu.h
+++ b/arch/sandbox/include/asm/mmu.h
@@ -5,5 +5,15 @@ static inline void remap_range(void *_start, size_t size, uint32_t flags)
 {
 }
 
+static inline uint32_t mmu_get_pte_cached_flags(void)
+{
+	return 0;
+}
+
+static inline uint32_t mmu_get_pte_uncached_flags(void)
+{
+	return 0;
+}
+
 #endif /* __ASM_MMU_H */
 
diff --git a/arch/x86/include/asm/mmu.h b/arch/x86/include/asm/mmu.h
index 0485a43..eed4c33 100644
--- a/arch/x86/include/asm/mmu.h
+++ b/arch/x86/include/asm/mmu.h
@@ -5,5 +5,15 @@ static inline void remap_range(void *_start, size_t size, uint32_t flags)
 {
 }
 
+static inline uint32_t mmu_get_pte_cached_flags(void)
+{
+	return 0;
+}
+
+static inline uint32_t mmu_get_pte_uncached_flags(void)
+{
+	return 0;
+}
+
 #endif /* __ASM_MMU_H */
 
-- 
1.8.1




More information about the barebox mailing list