i.MX53, add access to third I2C peripheral

[George Pontis]

> -----Original Message-----
> From: Alexander Shiyan [mailto:shc_work at mail.ru]
> Sent: Monday, February 04, 2013 11:09 AM
> To: George Pontis
> Cc: barebox at lists.infradead.org
> Subject: Re: i.MX53, add access to third I2C peripheral
> 
> > All versions of the i.MX53 have three I2C peripherals. This patch
> provides
> > access to it.
> ...
> > +static inline struct device_d *imx53_add_i2c2(struct
> i2c_platform_data
> > *pdata)
> > +{
> > +       return imx_add_i2c((void *)MX53_I2C2_BASE_ADDR, 2, pdata);
> > +}
> > +
> MX53_I2C3_BASE_ADDR ?
> 
> ---

Thanks for the correction Alex. I also forgot to handle the clock for this new peripheral. With both in place, a device on the third bus is recognized at boot and listed by devinfo.

diff -Naur bb.a/arch/arm/mach-imx/include/mach/devices-imx53.h bb.b/arch/arm/mach-imx/include/mach/devic
es-imx53.h
--- bb.a/arch/arm/mach-imx/include/mach/devices-imx53.h 2013-02-04 06:24:51.000000000 -0800
+++ bb.b/arch/arm/mach-imx/include/mach/devices-imx53.h 2013-02-03 22:24:26.930091420 -0800
@@ -21,6 +21,11 @@
        return imx_add_i2c((void *)MX53_I2C2_BASE_ADDR, 1, pdata);
 }

+static inline struct device_d *imx53_add_i2c2(struct i2c_platform_data *pdata)
+{
+       return imx_add_i2c((void *)MX53_I2C3_BASE_ADDR, 2, pdata);
+}
+
 static inline struct device_d *imx53_add_uart0(void)
 {
        return imx_add_uart_imx21((void *)MX53_UART1_BASE_ADDR, 0);
diff -Naur bb.a/arch/arm/mach-imx/clk-imx5.c bb.b/arch/arm/mach-imx/clk-imx5.c
--- bb.a/arch/arm/mach-imx/clk-imx5.c   2013-02-04 06:24:51.000000000 -0800
+++ bb.b/arch/arm/mach-imx/clk-imx5.c   2013-02-04 16:14:04.729284183 -0800
@@ -272,6 +272,7 @@
        clkdev_add_physbase(clks[uart_root], MX53_UART3_BASE_ADDR, NULL);
        clkdev_add_physbase(clks[per_root], MX53_I2C1_BASE_ADDR, NULL);
        clkdev_add_physbase(clks[per_root], MX53_I2C2_BASE_ADDR, NULL);
+       clkdev_add_physbase(clks[per_root], MX53_I2C3_BASE_ADDR, NULL);
        clkdev_add_physbase(clks[per_root], MX53_GPT1_BASE_ADDR, NULL);
        clkdev_add_physbase(clks[ipg], MX53_CSPI_BASE_ADDR, NULL);
        clkdev_add_physbase(clks[ecspi_podf], MX53_ECSPI1_BASE_ADDR, NULL);